https://github.com/vpykhtin updated
https://github.com/llvm/llvm-project/pull/71556
>From 871f5eca90d9b3699faeef1b7847c6ea48981910 Mon Sep 17 00:00:00 2001
From: Valery Pykhtin
Date: Mon, 20 Nov 2023 15:22:16 +0100
Subject: [PATCH] add instcombine rule
---
https://github.com/Flakebi approved this pull request.
https://github.com/llvm/llvm-project/pull/71556
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https://github.com/vpykhtin updated
https://github.com/llvm/llvm-project/pull/71556
>From b6204d32554f082821da100043bf872b62f1740b Mon Sep 17 00:00:00 2001
From: Valery Pykhtin
Date: Mon, 20 Nov 2023 15:22:16 +0100
Subject: [PATCH] add instcombine rule
---
vpykhtin wrote:
This is ready to be submitted if there're no objections.
https://github.com/llvm/llvm-project/pull/71556
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https://github.com/vpykhtin updated
https://github.com/llvm/llvm-project/pull/71556
>From 526c635b3f70fd779f0919c5c40acd017a0f800e Mon Sep 17 00:00:00 2001
From: Valery Pykhtin
Date: Mon, 20 Nov 2023 15:22:16 +0100
Subject: [PATCH 1/3] add instcombine rule
---
vpykhtin wrote:
I'm going to rebase it on top of
https://github.com/llvm/llvm-project/pull/73779 to show test changes.
https://github.com/llvm/llvm-project/pull/71556
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@@ -961,6 +961,18 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner ,
IntrinsicInst ) const {
return IC.replaceInstUsesWith(II,
Constant::getNullValue(II.getType()));
}
}
+if (ST->isWave32() && II.getType()->getIntegerBitWidth() == 64) {
+ // %b64 =
@@ -2314,9 +2314,8 @@ void AMDGPUDAGToDAGISel::SelectBRCOND(SDNode *N) {
SDValue VCMP = Cond->getOperand(0);
auto CC = cast(Cond->getOperand(2))->get();
auto *CRHS = dyn_cast(Cond->getOperand(1));
-if ((CC == ISD::SETEQ || CC == ISD::SETNE) && CRHS &&
