@@ -21471,6 +21471,53 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT,
EVT DstVT) {
(SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST,
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78637
>From efd07e93aed51049ad3783c701284617ae446330 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 17 Jan 2024 11:11:59 +
Subject: [PATCH 1/7] [AArch64] Combine store (trunc X to <3 x i8>) to sequence
of
