On 03/05/2013 12:27, Andrew Miehs wrote:
> Do the WS-X6748s also have these issues? I wouldn't even bother trying with
> the smaller cards
the WS-X6748 / WS-X6724 (both TX and SFP models) have 1.3M buffers per
port, statically divided up as 0.3M for ingress and 1M for egress. This is
insuffic
On Fri, May 3, 2013 at 12:16 AM, Nick Hilliard wrote:
> On 02/05/2013 13:21, Andrew Miehs wrote:
> > For iSCSI I would be looking at 45xx, 49xx, 65xx or Nexus 5k or 7k.
>
> 6500 lan cards also have quite poor buffers. Better to use a system with
> larger shared buffers rather than smaller dedica
On 02/05/2013 13:21, Andrew Miehs wrote:
> For iSCSI I would be looking at 45xx, 49xx, 65xx or Nexus 5k or 7k.
6500 lan cards also have quite poor buffers. Better to use a system with
larger shared buffers rather than smaller dedicated buffers, if it's
store-n-forward. Cut-thru switches behave s
+1
All of those access class switches have terrible buffers, you don't want to
run SAN traffic on them.
-Blake
On Thu, May 2, 2013 at 7:21 AM, Andrew Miehs wrote:
> On Tue, May 11, 2010 at 10:26 PM, Skeeve Stevens >wrote:
>
> > I am doing some iSCSI implementations are the moment and are lo
On Tue, May 11, 2010 at 10:26 PM, Skeeve Stevens wrote:
> I am doing some iSCSI implementations are the moment and are looking at
> which switch models are best for different iSCSI rollouts we’re doing.
>
> ** **
>
> I am wanting to know which 29xx and 35xx/37xx series switches have the
> followi
May be this is helpful :
http://people.ucsc.edu/~warner/buffer.html
"Information here is by *rumor, innuendo and extrapolation*. Manufacturers
rarely put info on packet buffers in their data sheets."
On Tue, May 11, 2010 at 3:26 PM, Skeeve Stevens wrote:
> Hey all,
>
> ** **
>
> I am doing
Hey all,
I am doing some iSCSI implementations are the moment and are looking at which
switch models are best for different iSCSI rollouts we're doing.
I am wanting to know which 29xx and 35xx/37xx series switches have the
following:
- Size of packet buffering per model
- I
Hi,
On Thu, Jun 03, 2010 at 07:11:29AM -0500, Jeff Bacon wrote:
> It's all ok, even with bursty traffic (sorta), as long as your inputs
> match your outputs, e.g. there's nothing to buffer. It's when that's not
> the case that everything goes to hell.
Well, if there's nothing to buffer, then the
> > The 2960/3560 make no mention of packet buffer arrangement or depth.
> >
> > But I'm somewhat surprised that the 2950 has as much as 4x the depth
of
> > the 3550 in terms of packet buffering(!).
>
> Don't be. The newer switches have even less...
>
> *2960G - only 384 kB per ASIC - i.e. 8 GE (
Hi,
On Wed, Jun 02, 2010 at 05:14:14PM +0200, Marian ?urkovi? wrote:
> Don't be. The newer switches have even less...
>
> *2960G - only 384 kB per ASIC - i.e. 8 GE (!) ports.
Oh yes. The wonders of capitalism.
(This is the first time I see actual numbers for the 2960G, and this
certainly expla
On Wed, Jun 02, 2010 at 10:53:08AM -0400, Jeff Kell wrote:
> *2950SX-48 *13.6Gbps backplane, 10.1Mpps forwarding, 16Mb DRAM, "8 MB
> packet buffer memory architecture shared by all ports"
>
> *3550-48 *13.6Gbps backplane, 10.1Mpps forwarding, 64Mb DRAM, "4 MB
> memory architecture shared by all po
To dredge up an old thread one more time as I am still looking for
answers...
2950 data sheets state (in summary, the details are scattered throughout
the document)
*2950SX-48 *13.6Gbps backplane, 10.1Mpps forwarding, 16Mb DRAM, "8 MB
packet buffer memory architecture shared by all ports"
35
ho's there?
> -Original Message-
> From: cisco-nsp-boun...@puck.nether.net [mailto:cisco-nsp-
> boun...@puck.nether.net] On Behalf Of Seth Mattinen
> Sent: Tuesday, 25 May 2010 2:15 PM
> To: cisco-nsp@puck.nether.net
> Subject: Re: [c-nsp] Cisco Switch Packet Buffering Matrix
On 5/24/10 3:16 PM, Skeeve Stevens wrote:
> If it requires an NDA or me having to talk to Cisco to find out this basic
> information, then I will drop Cisco off the list for consideration as you
> rightly point out, the others all provide this detail upfront.
>
> How does Cisco expect us to sell
--Original Message-
> From: "Arie Vayner (avayner)"
> Date: Mon, 24 May 2010 16:47:38
> To: Skeeve Stevens;
> Subject: Re: [c-nsp] Cisco Switch Packet Buffering Matrix?
>
> Skeeve,
>
> If you want to get this info in the "right" way, then the best appr
. These features
usually will indicate what their "maxiums" are on the platforms in question,
while you're configuring them.
-Tk
-Original Message-
From: "Arie Vayner (avayner)"
Date: Mon, 24 May 2010 16:47:38
To: Skeeve Stevens;
Subject: Re: [c-nsp] Cisco Switc
erformance, which is
important for storage-related applications.
Arie
-Original Message-
From: cisco-nsp-boun...@puck.nether.net
[mailto:cisco-nsp-boun...@puck.nether.net] On Behalf Of Skeeve Stevens
Sent: Monday, May 24, 2010 16:04
To: cisco-nsp@puck.nether.net
Subject: [c-nsp] Cisco Swi
I don't think this email got through the other day... I didn't see it appear.
...Skeeve
From: Skeeve Stevens
Sent: Tuesday, 11 May 2010 10:27 PM
To: cisco-nsp@puck.nether.net
Subject: Cisco Switch Packet Buffering Matrix?
Hey all,
I am doing some iSCSI implementations are the moment and are lo
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