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here is the log from the commit of package python-distorm3 for openSUSE:Factory
checked in at 2021-05-13 22:18:37
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/python-distorm3 (Old)
and /work/SRC/openSUSE:Factory/.python-distorm3.new.2988 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "python-distorm3"
Thu May 13 22:18:37 2021 rev:19 rq:892587 version:3.5.2
Changes:
--------
--- /work/SRC/openSUSE:Factory/python-distorm3/python-distorm3.changes
2020-07-01 14:27:07.042846168 +0200
+++
/work/SRC/openSUSE:Factory/.python-distorm3.new.2988/python-distorm3.changes
2021-05-13 22:18:42.711552474 +0200
@@ -1,0 +2,8 @@
+Wed May 12 21:22:50 UTC 2021 - Dirk M??ller <dmuel...@suse.com>
+
+- update to 3.5.2:
+ * fixed signedd of 32 bits immediates in formatting code
+ * fix for default segment in MEM/DISP for 64 bits
+ * added registers list for used registers in every instruction in python
+
+-------------------------------------------------------------------
Old:
----
distorm3-3.5.0.tar.gz
New:
----
distorm3-3.5.2.tar.gz
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ python-distorm3.spec ++++++
--- /var/tmp/diff_new_pack.4isOyH/_old 2021-05-13 22:18:43.187550819 +0200
+++ /var/tmp/diff_new_pack.4isOyH/_new 2021-05-13 22:18:43.191550805 +0200
@@ -1,7 +1,7 @@
#
# spec file for package python-distorm3
#
-# Copyright (c) 2020 SUSE LLC
+# Copyright (c) 2021 SUSE LLC
#
# All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed
@@ -19,7 +19,7 @@
%{?!python_module:%define python_module() python-%{**} python3-%{**}}
%define modname distorm3
Name: python-%{modname}
-Version: 3.5.0
+Version: 3.5.2
Release: 0
Summary: Disassembler Library For x86/AMD64
License: BSD-3-Clause
++++++ distorm3-3.5.0.tar.gz -> distorm3-3.5.2.tar.gz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/COPYING new/distorm3-3.5.2/COPYING
--- old/distorm3-3.5.0/COPYING 2020-04-21 14:56:02.000000000 +0200
+++ new/distorm3-3.5.2/COPYING 2021-03-19 17:14:24.000000000 +0100
@@ -1,6 +1,6 @@
:[diStorm3}:
The ultimate disassembler library.
-Copyright (c) 2003-2020, Gil Dabah
+Copyright (c) 2003-2021, Gil Dabah
All rights reserved.
Redistribution and use in source and binary forms, with or without
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/PKG-INFO new/distorm3-3.5.2/PKG-INFO
--- old/distorm3-3.5.0/PKG-INFO 2020-05-30 09:13:37.000000000 +0200
+++ new/distorm3-3.5.2/PKG-INFO 2021-03-19 18:14:23.000000000 +0100
@@ -1,6 +1,6 @@
Metadata-Version: 1.2
Name: distorm3
-Version: 3.5.0
+Version: 3.5.2
Summary: The goal of diStorm3 is to decode x86/AMD64 binary streams and return
a structure that describes each instruction.
Home-page: https://github.com/gdabah/distorm/
Author: Gil Dabah
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/README.md new/distorm3-3.5.2/README.md
--- old/distorm3-3.5.0/README.md 2020-04-21 14:56:02.000000000 +0200
+++ new/distorm3-3.5.2/README.md 2021-03-19 17:14:24.000000000 +0100
@@ -7,6 +7,8 @@
diStorm3 is super lightweight (~45KB), ultra fast and easy to use (a single
API)!
+For a tested and light hooking library see the
https://github.com/gdabah/distormx project.
+
"We benchmarked five popular open-source disassembly libraries and chose
diStorm3, which had the best performance (and furthermore, has complete 64-bit
support).", July 2014, Quoting David Williams-King in his Thesis about Binary
Shuffling.
diStorm3 is licensed under BSD!
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/include/distorm.h
new/distorm3-3.5.2/include/distorm.h
--- old/distorm3-3.5.0/include/distorm.h 2020-05-30 09:10:05.000000000
+0200
+++ new/distorm3-3.5.2/include/distorm.h 2021-03-19 18:08:44.000000000
+0100
@@ -1,4 +1,4 @@
-/* diStorm 3.5.0 */
+/* diStorm 3.5.2 */
/*
distorm.h
@@ -6,7 +6,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
@@ -33,29 +33,27 @@
#undef SUPPORT_64BIT_OFFSET
#endif
-/* If your compiler doesn't support stdint.h, define your own 64 bits type. */
-#ifdef SUPPORT_64BIT_OFFSET
- #ifdef _MSC_VER
- #define OFFSET_INTEGER unsigned __int64
- #else
- #include <stdint.h>
- #define OFFSET_INTEGER uint64_t
- #endif
+#ifndef _MSC_VER
+#include <stdint.h>
#else
- /* 32 bit offsets are used. */
- #define OFFSET_INTEGER unsigned long
+/* Since MSVC < 2010 isn't shipped with stdint.h,
+ * here are those from MSVC 2017, which also match
+ * those in tinycc/libc. */
+typedef signed char int8_t;
+typedef short int16_t;
+typedef int int32_t;
+typedef long long int64_t;
+typedef unsigned char uint8_t;
+typedef unsigned short uint16_t;
+typedef unsigned int uint32_t;
+typedef unsigned long long uint64_t;
#endif
-#ifdef _MSC_VER
-/* Since MSVC isn't shipped with stdint.h, we will have our own: */
-typedef signed __int64 int64_t;
-typedef unsigned __int64 uint64_t;
-typedef signed __int32 int32_t;
-typedef unsigned __int32 uint32_t;
-typedef signed __int16 int16_t;
-typedef unsigned __int16 uint16_t;
-typedef signed __int8 int8_t;
-typedef unsigned __int8 uint8_t;
+#ifdef SUPPORT_64BIT_OFFSET
+#define OFFSET_INTEGER uint64_t
+#else
+/* 32 bit offsets are used. */
+#define OFFSET_INTEGER uint32_t
#endif
/* Support C++ compilers */
@@ -392,12 +390,15 @@
#define DF_STOP_ON_HLT 0x400
/* The decoder will stop and return to the caller when it encounters a
privileged instruction. */
#define DF_STOP_ON_PRIVILEGED 0x800
+/* The decoder will stop and return to the caller when an instruction couldn't
be decoded. */
+#define DF_STOP_ON_UNDECODEABLE 0x1000
/* The decoder will not synchronize to the next byte after the previosuly
decoded instruction, instead it will start decoding at the next byte. */
-#define DF_SINGLE_BYTE_STEP 0x1000
+#define DF_SINGLE_BYTE_STEP 0x2000
/* The decoder will fill in the eflags fields for the decoded instruction. */
-#define DF_FILL_EFLAGS 0x2000
+#define DF_FILL_EFLAGS 0x4000
/* The decoder will use the addrMask in CodeInfo structure instead of
DF_MAXIMUM_ADDR16/32. */
-#define DF_USE_ADDR_MASK 0x4000
+#define DF_USE_ADDR_MASK 0x8000
+
/* The decoder will stop and return to the caller when any flow control
instruction was decoded. */
#define DF_STOP_ON_FLOW_CONTROL (DF_STOP_ON_CALL | DF_STOP_ON_RET |
DF_STOP_ON_SYS | DF_STOP_ON_UNC_BRANCH | DF_STOP_ON_CND_BRANCH | DF_STOP_ON_INT
| DF_STOP_ON_CMOV | DF_STOP_ON_HLT)
@@ -424,7 +425,7 @@
#define FC_HLT 8
/* Return code of the decoding function. */
-typedef enum { DECRES_NONE, DECRES_SUCCESS, DECRES_MEMORYERR, DECRES_INPUTERR,
DECRES_FILTERED } _DecodeResult;
+typedef enum { DECRES_NONE, DECRES_SUCCESS, DECRES_MEMORYERR, DECRES_INPUTERR
} _DecodeResult;
/* Define the following interface functions only for outer projects. */
#if !(defined(DISTORM_STATIC) || defined(DISTORM_DYNAMIC))
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/include/mnemonics.h
new/distorm3-3.5.2/include/mnemonics.h
--- old/distorm3-3.5.0/include/mnemonics.h 2020-05-30 08:50:32.000000000
+0200
+++ new/distorm3-3.5.2/include/mnemonics.h 2021-03-19 18:08:41.000000000
+0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/python/distorm3/__init__.py
new/distorm3-3.5.2/python/distorm3/__init__.py
--- old/distorm3-3.5.0/python/distorm3/__init__.py 2020-05-15
14:38:08.000000000 +0200
+++ new/distorm3-3.5.2/python/distorm3/__init__.py 2021-03-19
17:14:24.000000000 +0100
@@ -23,12 +23,13 @@
'Decode64Bits',
'Mnemonics',
'Registers',
+ 'RegisterMasks'
]
from ctypes import *
import os
import sys
-from ._generated import Registers, Mnemonics
+from ._generated import Registers, Mnemonics, RegisterMasks
if sys.version_info[0] >= 3:
xrange = range
@@ -45,7 +46,7 @@
pass
dll_ext = ('.dll' if sys.platform == 'win32' else '.so')
- libnames = ['_distorm3' + dll_ext]
+ libnames = ['_distorm3' + dll_ext, '_distorm3.pyd']
for dir in sys.path:
for name in libnames:
_distorm_file = os.path.join(dir, name)
@@ -91,7 +92,7 @@
class _CodeInfo (Structure):
_fields_ = [
- ('codeOffset', _OffsetType),
+ ('codeOffset', _OffsetType),
('addrMask', _OffsetType),
('nextOffset', _OffsetType),
('code', c_char_p),
@@ -103,7 +104,7 @@
class _DecodedInst (Structure):
_fields_ = [
('offset', _OffsetType),
- ('size', c_uint),
+ ('size', c_uint),
('mnemonic', _WString),
('operands', _WString),
('instructionHex', _WString)
@@ -209,11 +210,11 @@
]
# CPU flags that instructions modify, test or undefine (are EFLAGS
compatible!).
-D_CF = 1 # Carry #
-D_PF = 4 # Parity #
-D_AF = 0x10 # Auxiliary #
-D_ZF = 0x40 # Zero #
-D_SF = 0x80 # Sign #
+D_CF = 1 # Carry #
+D_PF = 4 # Parity #
+D_AF = 0x10 # Auxiliary #
+D_ZF = 0x40 # Zero #
+D_SF = 0x80 # Sign #
D_IF = 0x200 # Interrupt #
D_DF = 0x400 # Direction #
D_OF = 0x800 # Overflow #
@@ -235,8 +236,11 @@
DF_STOP_ON_CMOV = 0x200
DF_STOP_ON_HLT = 0x400
DF_STOP_ON_PRIVILEGED = 0x800
-DF_SINGLE_BYTE_STEP = 0x1000
-DF_FILL_EFLAGS = 0x2000
+DF_STOP_ON_UNDECODEABLE = 0x1000
+DF_SINGLE_BYTE_STEP = 0x2000
+DF_FILL_EFLAGS = 0x4000
+DF_USE_ADDR_MASK = 0x8000
+
DF_STOP_ON_FLOW_CONTROL = (DF_STOP_ON_CALL | DF_STOP_ON_RET | DF_STOP_ON_SYS |
\
DF_STOP_ON_UNC_BRANCH | DF_STOP_ON_CND_BRANCH | DF_STOP_ON_INT |
DF_STOP_ON_CMOV | \
DF_STOP_ON_HLT)
@@ -431,16 +435,16 @@
# TODO: put FlowControlFlags together in one class with _repr_.
class FlowControl:
- """ The flow control instruction will be flagged in the lo byte of the
'meta' field in _InstInfo of diStorm.
- They are used to distinguish between flow control instructions (such
as: ret, call, jmp, jz, etc) to normal ones. """
- (CALL,
- RET,
- SYS,
- UNC_BRANCH,
- CND_BRANCH,
- INT,
- CMOV,
- HLT) = range(1, 9)
+ """ The flow control instruction will be flagged in the lo byte of the
'meta' field in _InstInfo of diStorm.
+ They are used to distinguish between flow control instructions (such as:
ret, call, jmp, jz, etc) to normal ones. """
+ (CALL,
+ RET,
+ SYS,
+ UNC_BRANCH,
+ CND_BRANCH,
+ INT,
+ CMOV,
+ HLT) = range(1, 9)
def _getOpSize(flags):
return ((flags >> 7) & 3)
@@ -565,6 +569,17 @@
self.segment = R_NONE
self.isSegmentDefault = False
self.unusedPrefixesMask = di.unusedPrefixesMask
+ self.usedRegistersMask = di.usedRegistersMask
+
+ # calculate register masks
+ self.registers = []
+ maskIndex = 1
+ v = self.usedRegistersMask
+ while (v):
+ if (v & maskIndex):
+ self.registers.append(RegisterMasks[maskIndex])
+ v ^= maskIndex
+ maskIndex <<= 1
if flags == FLAG_NOT_DECODABLE:
self.mnemonic = 'DB 0x%02x' % (di.imm.byte)
@@ -699,7 +714,7 @@
p_code = byref(code_buf, codeOffset - startCodeOffset)
codeLen = codeLen - delta
- if (features & (DF_STOP_ON_FLOW_CONTROL | DF_STOP_ON_PRIVILEGED)) != 0:
+ if (features & (DF_STOP_ON_FLOW_CONTROL | DF_STOP_ON_PRIVILEGED |
DF_STOP_ON_UNDECODEABLE)) != 0:
break # User passed a stop flag.
def Decompose(offset, code, type = Decode32Bits, features = 0):
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/python/distorm3/_generated.py
new/distorm3-3.5.2/python/distorm3/_generated.py
--- old/distorm3-3.5.0/python/distorm3/_generated.py 2020-05-16
12:09:42.000000000 +0200
+++ new/distorm3-3.5.2/python/distorm3/_generated.py 2021-03-19
17:14:24.000000000 +0100
@@ -258,3 +258,29 @@
"YMM0", "YMM1", "YMM2", "YMM3", "YMM4", "YMM5", "YMM6", "YMM7", "YMM8",
"YMM9", "YMM10", "YMM11", "YMM12", "YMM13", "YMM14", "YMM15",
"CR0", "", "CR2", "CR3", "CR4", "", "", "", "CR8",
"DR0", "DR1", "DR2", "DR3", "", "", "DR6", "DR7"]
+
+RegisterMasks = {
+1: "RM_AX", # /* AL, AH, AX, EAX, RAX */
+2: "RM_CX", # /* CL, CH, CX, ECX, RCX */
+4: "RM_DX", # /* DL, DH, DX, EDX, RDX */
+8: "RM_BX", # /* BL, BH, BX, EBX, RBX */
+0x10: "RM_SP", # /* SPL, SP, ESP, RSP */
+0x20: "RM_BP", # /* BPL, BP, EBP, RBP */
+0x40: "RM_SI", # /* SIL, SI, ESI, RSI */
+0x80: "RM_DI", # /* DIL, DI, EDI, RDI */
+0x100: "RM_FPU", # /* ST(0) - ST(7) */
+0x200: "RM_MMX", # /* MM0 - MM7 */
+0x400: "RM_SSE", # /* XMM0 - XMM15 */
+0x800: "RM_AVX", # /* YMM0 - YMM15 */
+0x1000: "RM_CR", # /* CR0, CR2, CR3, CR4, CR8 */
+0x2000: "RM_DR", # /* DR0, DR1, DR2, DR3, DR6, DR7 */
+0x4000: "RM_R8", # /* R8B, R8W, R8D, R8 */
+0x8000: "RM_R9", # /* R9B, R9W, R9D, R9 */
+0x10000: "RM_R10", # /* R10B, R10W, R10D, R10 */
+0x20000: "RM_R11", # /* R11B, R11W, R11D, R11 */
+0x40000: "RM_R12", # /* R12B, R12W, R12D, R12 */
+0x80000: "RM_R13", # /* R13B, R13W, R13D, R13 */
+0x100000: "RM_R14", # /* R14B, R14W, R14D, R14 */
+0x200000: "RM_R15", # /* R15B, R15W, R15D, R15 */
+0x400000: "RM_SEG", # /* CS, SS, DS, ES, FS, GS */
+}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/python/distorm3.egg-info/PKG-INFO
new/distorm3-3.5.2/python/distorm3.egg-info/PKG-INFO
--- old/distorm3-3.5.0/python/distorm3.egg-info/PKG-INFO 2020-05-30
09:13:37.000000000 +0200
+++ new/distorm3-3.5.2/python/distorm3.egg-info/PKG-INFO 2021-03-19
18:14:23.000000000 +0100
@@ -1,6 +1,6 @@
Metadata-Version: 1.2
Name: distorm3
-Version: 3.5.0
+Version: 3.5.2
Summary: The goal of diStorm3 is to decode x86/AMD64 binary streams and return
a structure that describes each instruction.
Home-page: https://github.com/gdabah/distorm/
Author: Gil Dabah
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/python/test_distorm3.py
new/distorm3-3.5.2/python/test_distorm3.py
--- old/distorm3-3.5.0/python/test_distorm3.py 2020-05-27 18:19:19.000000000
+0200
+++ new/distorm3-3.5.2/python/test_distorm3.py 2021-03-19 17:14:24.000000000
+0100
@@ -169,6 +169,9 @@
I16("int 0x55").check_imm(0, 0x55, 8)
def test_imm16(self):
I16("ret 0x1122").check_imm(0, 0x1122, 16)
+ def test_seimm32(self):
+ I16("mov ax, 0xff80").check_imm(1, 0xff80, 16)
+ self.assertTrue(str(IB16("BA8080").inst).find("0x8080") != -1)
def test_imm_full(self):
I16("push 0x1234").check_imm(0, 0x1234, 16)
def test_imm_aadm(self):
@@ -401,6 +404,9 @@
I32("int 0x55").check_imm(0, 0x55, 8)
def test_imm16(self):
I32("ret 0x1122").check_imm(0, 0x1122, 16)
+ def test_seimm32(self):
+ I32("mov eax, 0xff112233").check_imm(1, 0xff112233, 32)
+ self.assertTrue(str(IB32("BA5F6038CE").inst).find("0xce38605f")
!= -1)
def test_imm_full(self):
I32("push 0x12345678").check_imm(0, 0x12345678, 32)
def test_imm_aadm(self):
@@ -687,6 +693,9 @@
I64("int 0x55").check_imm(0, 0x55, 8)
def test_imm16(self):
I64("ret 0x1122").check_imm(0, 0x1122, 16)
+ def test_seimm32(self):
+ I64("mov eax, 0xff112233").check_imm(1, -15654349, 32)
+ self.assertTrue(str(IB64("BA5F6038CE").inst).find("0xce38605f")
!= -1)
def test_imm_full(self):
I64("push 0x12345678").check_imm(0, 0x12345678, 32)
I64("mov rax, 0x1234567812345678").check_imm(1,
0x1234567812345678, 64)
@@ -1005,10 +1014,10 @@
class TestInstTable(unittest.TestCase):
""" Check that locate_inst algorithm covers all opcode-length (ol)
- for the varying sizes of opcodes.
- The bad tests should not find an instruction, so they should fail
on purpose,
- to see we don't crash the diassembler.
- Also test for some end-cases with nop and wait. """
+ for the varying sizes of opcodes.
+ The bad tests should not find an instruction, so they should
fail on purpose,
+ to see we don't crash the diassembler.
+ Also test for some end-cases with nop and wait. """
def test_c7_opcode(self):
IB32("c7f8aaaaaaaa").check_mnemonic("XBEGIN")
IB64("c7f8aaaaaaaa").check_mnemonic("XBEGIN")
@@ -1881,6 +1890,10 @@
def test_zzz_must_be_last_drop_prefixes(self):
# Drop prefixes when the last byte in stream is a prefix.
IB32("66")
+ def test_CR4_regression(self):
+ # Regression test to validate CR4 isn't used as invalid default
segment (-1 maps to CR4) in 64 bits.
+ self.assertEqual(str(IB64("f20f104c1860").inst), "MOVSD XMM1,
[RAX+RBX+0x60]")
+ self.assertEqual(str(IB64("4883241e00").inst), "AND QWORD
[RSI+RBX], 0x0")
def test_undefined_byte00(self):
# This is a regression test for the decomposer wrapper.
a = ""
@@ -1989,6 +2002,10 @@
self.assertEqual(a[2].modifiedFlags, 0)
self.assertEqual(a[2].testedFlags, 0)
self.assertEqual(a[2].undefinedFlags, 0)
+ def test_stop_undecodable(self):
+ self.assertEqual(len(IB16("909033c0ffff90",
distorm3.DF_STOP_ON_UNDECODEABLE).insts), 4)
+ self.assertEqual(len(IB32("909033c090ffff90",
distorm3.DF_STOP_ON_UNDECODEABLE).insts), 5)
+ self.assertEqual(len(IB64("909033c09090ffff9090",
distorm3.DF_STOP_ON_UNDECODEABLE).insts), 6)
class TestAPI(unittest.TestCase):
def direct_decompose(self, code, codeOffset, dt, features,
maxInstructions):
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/setup.py new/distorm3-3.5.2/setup.py
--- old/distorm3-3.5.0/setup.py 2020-05-30 09:10:39.000000000 +0200
+++ new/distorm3-3.5.2/setup.py 2021-03-19 18:06:50.000000000 +0100
@@ -27,7 +27,7 @@
'ext_modules' : [distorm_module],
# Metadata
'name' : 'distorm3',
- 'version' : '3.5.0',
+ 'version' : '3.5.2',
'description' : 'The goal of diStorm3 is to decode x86/AMD64' \
' binary streams and return a structure that' \
' describes each instruction.',
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/config.h
new/distorm3-3.5.2/src/config.h
--- old/distorm3-3.5.0/src/config.h 2020-05-30 09:09:58.000000000 +0200
+++ new/distorm3-3.5.2/src/config.h 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
@@ -13,7 +13,7 @@
#define CONFIG_H
/* diStorm version number. */
-#define __DISTORMV__ 0x030500
+#define __DISTORMV__ 0x030502
#include <string.h> /* memset, memcpy - can be easily self implemented for
libc independency. */
@@ -57,7 +57,8 @@
#define _DLLEXPORT_
#define _FASTCALL_
-#define _INLINE_ __inline__
+/* Keep inline as static (arrrrg) as it would break linux on some flavors
otherwise. */
+#define _INLINE_ static
/* GCC ignores this directive... */
/*#define _FASTCALL_ __attribute__((__fastcall__))*/
@@ -94,7 +95,7 @@
#define _DLLEXPORT_
#define _FASTCALL_
-#define _INLINE_
+#define _INLINE_ static
/* End of __TINYC__ */
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/decoder.c
new/distorm3-3.5.2/src/decoder.c
--- old/distorm3-3.5.0/src/decoder.c 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/decoder.c 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
@@ -204,7 +204,7 @@
/* Copy DST_WR flag. */
di->flags |= (instFlags & INST_DST_WR) >> (31 - 6); /* Copy bit
from INST_DST_WR (bit 31) to FLAG_DST_WR (bit 6). */
/* operands_extract may touched it for FPU operands, so add on
top. */
- di->opsNo += opsNo;
+ di->opsNo += (uint8_t)opsNo;
}
if (instFlags & (INST_3DNOW_FETCH |
@@ -548,6 +548,12 @@
pdi->size = 1;
pdi->addr = codeOffset & ci.addrMask;
pdi = (_DInst*)((char*)pdi + diStructSize);
+
+ /* If an instruction wasn't decoded then stop
on undecodeable if set. */
+ if (features & DF_STOP_ON_UNDECODEABLE) {
+ ret = DECRES_SUCCESS;
+ break;
+ }
}
/* Skip a single byte in case of a failure and retry
instruction. */
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/decoder.h
new/distorm3-3.5.2/src/decoder.h
--- old/distorm3-3.5.0/src/decoder.h 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/decoder.h 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/distorm.c
new/distorm3-3.5.2/src/distorm.c
--- old/distorm3-3.5.0/src/distorm.c 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/distorm.c 2021-03-19 18:08:13.000000000 +0100
@@ -5,7 +5,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
@@ -67,6 +67,7 @@
* MOVZX, MOVSX, MOVSXD.
* ROL, ROR, RCL, RCR, SHL, SHR, SAL, SAR.
* SHLD, SHRD.
+ * CVTSI2SS is also an exception.
*/
switch (di->opcode)
{
@@ -85,6 +86,7 @@
case I_SAR:
case I_SHLD:
case I_SHRD:
+ case I_CVTSI2SS:
isSizingRequired = 1;
break;
default: /* Instruction doesn't require sizing. */
break;
@@ -141,6 +143,7 @@
uint64_t addrMask = (uint64_t)-1;
const _WMnemonic* mnemonic;
int suffixSize = -1;
+ unsigned int i;
/* Set address mask, when default is for 64bits addresses. */
if (ci->features & DF_USE_ADDR_MASK) addrMask = ci->addrMask;
@@ -184,7 +187,7 @@
suffixSize = 0; /* Marks it's a string instruction. */
}
- for (unsigned int i = 0; i < di->opsNo; i++) {
+ for (i = 0; i < di->opsNo; i++) {
unsigned int type = di->ops[i].type;
if (i > 0) strcat_WS(str, ", ", 2, 2);
if (type == O_REG) {
@@ -199,7 +202,11 @@
tmpDisp64 = -di->imm.sbyte;
str_int(&str, tmpDisp64);
}
- else str_int(&str, di->imm.qword);
+ else {
+ /* Notice signedness and size of the immediate.
*/
+ if (di->ops[i].size == 0x20) str_int(&str,
di->imm.dword);
+ else str_int(&str, di->imm.qword);
+ }
}
else if (type == O_PC) {
#ifdef SUPPORT_64BIT_OFFSET
@@ -212,7 +219,7 @@
else if (type == O_DISP) {
distorm_format_size(&str, di, i);
chrcat_WS(str, OPEN_CHR);
- if (!SEGMENT_IS_DEFAULT(di->segment)) {
+ if (!SEGMENT_IS_DEFAULT_OR_NONE(di->segment)) {
strcat_WSR(&str,
&_REGISTERS[SEGMENT_GET_UNSAFE(di->segment)]);
chrcat_WS(str, SEG_OFF_CHR);
}
@@ -269,7 +276,7 @@
else if (type == O_MEM) {
distorm_format_size(&str, di, i);
chrcat_WS(str, OPEN_CHR);
- if (!SEGMENT_IS_DEFAULT(di->segment)) {
+ if (!SEGMENT_IS_DEFAULT_OR_NONE(di->segment)) {
strcat_WSR(&str,
&_REGISTERS[SEGMENT_GET_UNSAFE(di->segment)]);
chrcat_WS(str, SEG_OFF_CHR);
}
@@ -315,10 +322,10 @@
/* In-place considerations: DI is RESULT. Deref fields first. */
unsigned int opcode = di->opcode;
unsigned int prefix = FLAG_GET_PREFIX(di->flags);
- mnemonic = (const _WMnemonic*)&_MNEMONICS[opcode];
unsigned int size = di->size;
_OffsetType offset = di->addr & addrMask;
str = (unsigned char*)&result->mnemonic.p;
+ mnemonic = (const _WMnemonic*)&_MNEMONICS[opcode];
if (prefix) {
/* REP prefix for CMPS and SCAS is really a REPZ. */
@@ -354,6 +361,7 @@
{
_DecodeResult res;
_CodeInfo ci;
+ unsigned int i, instsCount;
*usedInstructionsCount = 0;
@@ -390,7 +398,8 @@
else ci.addrMask = (_OffsetType)-1;
res = decode_internal(&ci, TRUE, (_DInst*)result, maxInstructions,
usedInstructionsCount);
- for (unsigned int i = 0, instsCount = *usedInstructionsCount; i <
instsCount; i++) {
+ instsCount = *usedInstructionsCount;
+ for (i = 0; i < instsCount; i++) {
/* distorm_format is optimized and can work with same
input/output buffer in-place. */
#ifdef SUPPORT_64BIT_OFFSET
distorm_format64(&ci, (_DInst*)&result[i], &result[i]);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/instructions.c
new/distorm3-3.5.2/src/instructions.c
--- old/distorm3-3.5.0/src/instructions.c 2020-05-30 08:50:32.000000000
+0200
+++ new/distorm3-3.5.2/src/instructions.c 2021-03-19 18:08:13.000000000
+0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/instructions.h
new/distorm3-3.5.2/src/instructions.h
--- old/distorm3-3.5.0/src/instructions.h 2020-05-30 08:50:32.000000000
+0200
+++ new/distorm3-3.5.2/src/instructions.h 2021-03-19 18:08:13.000000000
+0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/insts.c
new/distorm3-3.5.2/src/insts.c
--- old/distorm3-3.5.0/src/insts.c 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/insts.c 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/insts.h
new/distorm3-3.5.2/src/insts.h
--- old/distorm3-3.5.0/src/insts.h 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/insts.h 2021-03-19 18:08:11.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/mnemonics.c
new/distorm3-3.5.2/src/mnemonics.c
--- old/distorm3-3.5.0/src/mnemonics.c 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/mnemonics.c 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/operands.c
new/distorm3-3.5.2/src/operands.c
--- old/distorm3-3.5.0/src/operands.c 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/operands.c 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
@@ -229,11 +229,8 @@
* Some instructions force the use of RM16 or other specific types, so take it
into account.
*/
-static int operands_extract_modrm(_CodeInfo* ci,
- _DInst* di, _OpType type,
- _PrefixState* ps,
- _DecodeType effOpSz, _DecodeType effAdrSz,
- unsigned int mod, unsigned int rm,
+static int operands_extract_modrm(_CodeInfo* ci, _PrefixState* ps, _DInst* di,
+ _DecodeType effAdrSz, unsigned int mod,
unsigned int rm,
_iflags instFlags, _Operand* op)
{
unsigned char sib = 0, base = 0;
@@ -452,7 +449,7 @@
default: return FALSE;
}
rm = modrm & 7;
- ret = operands_extract_modrm(ci, di, type, ps, effOpSz,
effAdrSz, mod, rm, instFlags, op);
+ ret = operands_extract_modrm(ci, ps, di, effAdrSz, mod, rm,
instFlags, op);
op->size = (uint16_t)size;
if ((op->type == O_SMEM) || (op->type == O_MEM)) {
di->usedRegistersMask |= _REGISTERTORCLASS[op->index];
@@ -558,7 +555,7 @@
}
/* Fill size of memory dereference for operand. */
rm = modrm & 7;
- ret = operands_extract_modrm(ci, di, type, ps, effOpSz,
effAdrSz, mod, rm, instFlags, op);
+ ret = operands_extract_modrm(ci, ps, di, effAdrSz, mod,
rm, instFlags, op);
op->size = (uint16_t)size;
if ((op->type == O_SMEM) || (op->type == O_MEM)) {
di->usedRegistersMask |=
_REGISTERTORCLASS[op->index];
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/operands.h
new/distorm3-3.5.2/src/operands.h
--- old/distorm3-3.5.0/src/operands.h 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/operands.h 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/prefix.c
new/distorm3-3.5.2/src/prefix.c
--- old/distorm3-3.5.0/src/prefix.c 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/prefix.c 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
@@ -128,6 +128,7 @@
const uint8_t* rexPos = NULL;
const uint8_t* start = ci->code;
uint8_t byte, vex;
+ unsigned int index;
/*
* First thing to do, scan for prefixes, there are six types of
prefixes.
* There may be up to six prefixes before a single instruction, not the
same type, no special order,
@@ -139,7 +140,7 @@
* We attach all prefixes to the next instruction, there might be two
or more occurrences from the same prefix.
* Also, since VEX can be allowed only once we will test it separately.
*/
- for (unsigned int index = 0;
+ for (index = 0;
(ci->codeLen > 0) && (index < INST_MAXIMUM_SIZE);
ci->code++, ci->codeLen--, index++) {
/*
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/prefix.h
new/distorm3-3.5.2/src/prefix.h
--- old/distorm3-3.5.0/src/prefix.h 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/prefix.h 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/textdefs.c
new/distorm3-3.5.2/src/textdefs.c
--- old/distorm3-3.5.0/src/textdefs.c 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/textdefs.c 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
@@ -19,7 +19,7 @@
void str_hex(_WString* s, const uint8_t* buf, unsigned int len)
{
/* 256 * 2 : 2 chars per byte value. */
- static char* TextBTable =
+ static const char* TextBTable =
"000102030405060708090a0b0c0d0e0f" \
"101112131415161718191a1b1c1d1e1f" \
"202122232425262728292a2b2c2d2e2f" \
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/textdefs.h
new/distorm3-3.5.2/src/textdefs.h
--- old/distorm3-3.5.0/src/textdefs.h 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/textdefs.h 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/wstring.h
new/distorm3-3.5.2/src/wstring.h
--- old/distorm3-3.5.0/src/wstring.h 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/wstring.h 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/distorm3-3.5.0/src/x86defs.h
new/distorm3-3.5.2/src/x86defs.h
--- old/distorm3-3.5.0/src/x86defs.h 2020-05-30 08:50:32.000000000 +0200
+++ new/distorm3-3.5.2/src/x86defs.h 2021-03-19 18:08:13.000000000 +0100
@@ -4,7 +4,7 @@
diStorm3 - Powerful disassembler for X86/AMD64
http://ragestorm.net/distorm/
distorm at gmail dot com
-Copyright (C) 2003-2020 Gil Dabah
+Copyright (C) 2003-2021 Gil Dabah
This library is licensed under the BSD license. See the file COPYING.
*/
