http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/35529b95/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h ---------------------------------------------------------------------- diff --git a/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h new file mode 100644 index 0000000..54591f0 --- /dev/null +++ b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h @@ -0,0 +1,426 @@ +/** + ****************************************************************************** + * @file stm32f7xx_hal_flash.h + * @author MCD Application Team + * @version V1.2.0 + * @date 30-December-2016 + * @brief Header file of FLASH HAL module. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F7xx_HAL_FLASH_H +#define __STM32F7xx_HAL_FLASH_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f7xx_hal_def.h" + +/** @addtogroup STM32F7xx_HAL_Driver + * @{ + */ + +/** @addtogroup FLASH + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup FLASH_Exported_Types FLASH Exported Types + * @{ + */ + +/** + * @brief FLASH Procedure structure definition + */ +typedef enum +{ + FLASH_PROC_NONE = 0U, + FLASH_PROC_SECTERASE, + FLASH_PROC_MASSERASE, + FLASH_PROC_PROGRAM +} FLASH_ProcedureTypeDef; + + +/** + * @brief FLASH handle Structure definition + */ +typedef struct +{ + __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /* Internal variable to indicate which procedure is ongoing or not in IT context */ + + __IO uint32_t NbSectorsToErase; /* Internal variable to save the remaining sectors to erase in IT context */ + + __IO uint8_t VoltageForErase; /* Internal variable to provide voltage range selected by user in IT context */ + + __IO uint32_t Sector; /* Internal variable to define the current sector which is erasing */ + + __IO uint32_t Address; /* Internal variable to save address selected for program */ + + HAL_LockTypeDef Lock; /* FLASH locking object */ + + __IO uint32_t ErrorCode; /* FLASH error code */ + +}FLASH_ProcessTypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup FLASH_Exported_Constants FLASH Exported Constants + * @{ + */ + +/** @defgroup FLASH_Error_Code FLASH Error Code + * @brief FLASH Error Code + * @{ + */ +#define HAL_FLASH_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ +#define HAL_FLASH_ERROR_ERS ((uint32_t)0x00000002U) /*!< Programming Sequence error */ +#define HAL_FLASH_ERROR_PGP ((uint32_t)0x00000004U) /*!< Programming Parallelism error */ +#define HAL_FLASH_ERROR_PGA ((uint32_t)0x00000008U) /*!< Programming Alignment error */ +#define HAL_FLASH_ERROR_WRP ((uint32_t)0x00000010U) /*!< Write protection error */ +#define HAL_FLASH_ERROR_OPERATION ((uint32_t)0x00000020U) /*!< Operation Error */ +#define HAL_FLASH_ERROR_RD ((uint32_t)0x00000040U) /*!< Read Protection Error */ +/** + * @} + */ + +/** @defgroup FLASH_Type_Program FLASH Type Program + * @{ + */ +#define FLASH_TYPEPROGRAM_BYTE ((uint32_t)0x00U) /*!< Program byte (8-bit) at a specified address */ +#define FLASH_TYPEPROGRAM_HALFWORD ((uint32_t)0x01U) /*!< Program a half-word (16-bit) at a specified address */ +#define FLASH_TYPEPROGRAM_WORD ((uint32_t)0x02U) /*!< Program a word (32-bit) at a specified address */ +#define FLASH_TYPEPROGRAM_DOUBLEWORD ((uint32_t)0x03U) /*!< Program a double word (64-bit) at a specified address */ +/** + * @} + */ + +/** @defgroup FLASH_Flag_definition FLASH Flag definition + * @brief Flag definition + * @{ + */ +#define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ +#define FLASH_FLAG_OPERR FLASH_SR_OPERR /*!< FLASH operation Error flag */ +#define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */ +#define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming Alignment error flag */ +#define FLASH_FLAG_PGPERR FLASH_SR_PGPERR /*!< FLASH Programming Parallelism error flag */ +#define FLASH_FLAG_ERSERR FLASH_SR_ERSERR /*!< FLASH Erasing Sequence error flag */ +#define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ + +#if defined (FLASH_OPTCR2_PCROP) +#define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< FLASH Read protection error flag */ +#define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \ + FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR | FLASH_FLAG_RDERR) +#else +#define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \ + FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR) +#endif /* FLASH_OPTCR2_PCROP */ +/** + * @} + */ + +/** @defgroup FLASH_Interrupt_definition FLASH Interrupt definition + * @brief FLASH Interrupt definition + * @{ + */ +#define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ +#define FLASH_IT_ERR ((uint32_t)0x02000000U) /*!< Error Interrupt source */ +/** + * @} + */ + +/** @defgroup FLASH_Program_Parallelism FLASH Program Parallelism + * @{ + */ +#define FLASH_PSIZE_BYTE ((uint32_t)0x00000000U) +#define FLASH_PSIZE_HALF_WORD ((uint32_t)FLASH_CR_PSIZE_0) +#define FLASH_PSIZE_WORD ((uint32_t)FLASH_CR_PSIZE_1) +#define FLASH_PSIZE_DOUBLE_WORD ((uint32_t)FLASH_CR_PSIZE) +#define CR_PSIZE_MASK ((uint32_t)0xFFFFFCFFU) +/** + * @} + */ + +/** @defgroup FLASH_Keys FLASH Keys + * @{ + */ +#define FLASH_KEY1 ((uint32_t)0x45670123U) +#define FLASH_KEY2 ((uint32_t)0xCDEF89ABU) +#define FLASH_OPT_KEY1 ((uint32_t)0x08192A3BU) +#define FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7FU) +/** + * @} + */ + +/** @defgroup FLASH_Sectors FLASH Sectors + * @{ + */ +#define FLASH_SECTOR_0 ((uint32_t)0U) /*!< Sector Number 0 */ +#define FLASH_SECTOR_1 ((uint32_t)1U) /*!< Sector Number 1 */ +#define FLASH_SECTOR_2 ((uint32_t)2U) /*!< Sector Number 2 */ +#define FLASH_SECTOR_3 ((uint32_t)3U) /*!< Sector Number 3 */ +#define FLASH_SECTOR_4 ((uint32_t)4U) /*!< Sector Number 4 */ +#define FLASH_SECTOR_5 ((uint32_t)5U) /*!< Sector Number 5 */ +#define FLASH_SECTOR_6 ((uint32_t)6U) /*!< Sector Number 6 */ +#define FLASH_SECTOR_7 ((uint32_t)7U) /*!< Sector Number 7 */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup FLASH_Exported_Macros FLASH Exported Macros + * @{ + */ +/** + * @brief Set the FLASH Latency. + * @param __LATENCY__: FLASH Latency + * The value of this parameter depend on device used within the same series + * @retval none + */ +#define __HAL_FLASH_SET_LATENCY(__LATENCY__) \ + MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(__LATENCY__)) + +/** + * @brief Get the FLASH Latency. + * @retval FLASH Latency + * The value of this parameter depend on device used within the same series + */ +#define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) + +/** + * @brief Enable the FLASH prefetch buffer. + * @retval none + */ +#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTEN) + +/** + * @brief Disable the FLASH prefetch buffer. + * @retval none + */ +#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTEN)) + +/** + * @brief Enable the FLASH Adaptive Real-Time memory accelerator. + * @note The ART accelerator is available only for flash access on ITCM interface. + * @retval none + */ +#define __HAL_FLASH_ART_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ARTEN) + +/** + * @brief Disable the FLASH Adaptive Real-Time memory accelerator. + * @retval none + */ +#define __HAL_FLASH_ART_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_ARTEN) + +/** + * @brief Resets the FLASH Adaptive Real-Time memory accelerator. + * @note This function must be used only when the Adaptive Real-Time memory accelerator + * is disabled. + * @retval None + */ +#define __HAL_FLASH_ART_RESET() (FLASH->ACR |= FLASH_ACR_ARTRST) + +/** + * @brief Enable the specified FLASH interrupt. + * @param __INTERRUPT__ : FLASH interrupt + * This parameter can be any combination of the following values: + * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt + * @arg FLASH_IT_ERR: Error Interrupt + * @retval none + */ +#define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) + +/** + * @brief Disable the specified FLASH interrupt. + * @param __INTERRUPT__ : FLASH interrupt + * This parameter can be any combination of the following values: + * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt + * @arg FLASH_IT_ERR: Error Interrupt + * @retval none + */ +#define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(uint32_t)(__INTERRUPT__)) + +/** + * @brief Get the specified FLASH flag status. + * @param __FLAG__: specifies the FLASH flag to check. + * This parameter can be one of the following values: + * @arg FLASH_FLAG_EOP : FLASH End of Operation flag + * @arg FLASH_FLAG_OPERR : FLASH operation Error flag + * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag + * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag + * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag + * @arg FLASH_FLAG_ERSERR : FLASH Erasing Sequence error flag + * @arg FLASH_FLAG_BSY : FLASH Busy flag + * @retval The new state of __FLAG__ (SET or RESET). + */ +#define __HAL_FLASH_GET_FLAG(__FLAG__) ((FLASH->SR & (__FLAG__))) + +/** + * @brief Clear the specified FLASH flag. + * @param __FLAG__: specifies the FLASH flags to clear. + * This parameter can be any combination of the following values: + * @arg FLASH_FLAG_EOP : FLASH End of Operation flag + * @arg FLASH_FLAG_OPERR : FLASH operation Error flag + * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag + * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag + * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag + * @arg FLASH_FLAG_ERSERR : FLASH Erasing Sequence error flag + * @retval none + */ +#define __HAL_FLASH_CLEAR_FLAG(__FLAG__) (FLASH->SR = (__FLAG__)) +/** + * @} + */ + +/* Include FLASH HAL Extension module */ +#include "stm32f7xx_hal_flash_ex.h" + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup FLASH_Exported_Functions + * @{ + */ +/** @addtogroup FLASH_Exported_Functions_Group1 + * @{ + */ +/* Program operation functions ***********************************************/ +HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data); +HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data); +/* FLASH IRQ handler method */ +void HAL_FLASH_IRQHandler(void); +/* Callbacks in non blocking modes */ +void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); +void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); +/** + * @} + */ + +/** @addtogroup FLASH_Exported_Functions_Group2 + * @{ + */ +/* Peripheral Control functions **********************************************/ +HAL_StatusTypeDef HAL_FLASH_Unlock(void); +HAL_StatusTypeDef HAL_FLASH_Lock(void); +HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); +HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); +/* Option bytes control */ +HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); +/** + * @} + */ + +/** @addtogroup FLASH_Exported_Functions_Group3 + * @{ + */ +/* Peripheral State functions ************************************************/ +uint32_t HAL_FLASH_GetError(void); +HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); +/** + * @} + */ + +/** + * @} + */ +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** @defgroup FLASH_Private_Variables FLASH Private Variables + * @{ + */ + +/** + * @} + */ +/* Private constants ---------------------------------------------------------*/ +/** @defgroup FLASH_Private_Constants FLASH Private Constants + * @{ + */ + +/** + * @brief OPTCR register byte 1 (Bits[15:8]) base address + */ +#define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15) + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup FLASH_Private_Macros FLASH Private Macros + * @{ + */ + +/** @defgroup FLASH_IS_FLASH_Definitions FLASH Private macros to check input parameters + * @{ + */ +#define IS_FLASH_TYPEPROGRAM(VALUE)(((VALUE) == FLASH_TYPEPROGRAM_BYTE) || \ + ((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \ + ((VALUE) == FLASH_TYPEPROGRAM_WORD) || \ + ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD)) +/** + * @} + */ + +/** + * @} + */ + +/* Private functions ---------------------------------------------------------*/ +/** @defgroup FLASH_Private_Functions FLASH Private Functions + * @{ + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F7xx_HAL_FLASH_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/35529b95/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h ---------------------------------------------------------------------- diff --git a/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h new file mode 100644 index 0000000..814350e --- /dev/null +++ b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h @@ -0,0 +1,663 @@ +/** + ****************************************************************************** + * @file stm32f7xx_hal_flash_ex.h + * @author MCD Application Team + * @version V1.2.0 + * @date 30-December-2016 + * @brief Header file of FLASH HAL Extension module. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F7xx_HAL_FLASH_EX_H +#define __STM32F7xx_HAL_FLASH_EX_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f7xx_hal_def.h" + +/** @addtogroup STM32F7xx_HAL_Driver + * @{ + */ + +/** @addtogroup FLASHEx + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup FLASHEx_Exported_Types FLASH Exported Types + * @{ + */ + +/** + * @brief FLASH Erase structure definition + */ +typedef struct +{ + uint32_t TypeErase; /*!< Mass erase or sector Erase. + This parameter can be a value of @ref FLASHEx_Type_Erase */ + +#if defined (FLASH_OPTCR_nDBANK) + uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. + This parameter must be a value of @ref FLASHEx_Banks */ +#endif /* FLASH_OPTCR_nDBANK */ + + uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled + This parameter must be a value of @ref FLASHEx_Sectors */ + + uint32_t NbSectors; /*!< Number of sectors to be erased. + This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/ + + uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism + This parameter must be a value of @ref FLASHEx_Voltage_Range */ + +} FLASH_EraseInitTypeDef; + +/** + * @brief FLASH Option Bytes Program structure definition + */ +typedef struct +{ + uint32_t OptionType; /*!< Option byte to be configured. + This parameter can be a value of @ref FLASHEx_Option_Type */ + + uint32_t WRPState; /*!< Write protection activation or deactivation. + This parameter can be a value of @ref FLASHEx_WRP_State */ + + uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected. + The value of this parameter depend on device used within the same series */ + + uint32_t RDPLevel; /*!< Set the read protection level. + This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ + + uint32_t BORLevel; /*!< Set the BOR Level. + This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */ + + uint32_t USERConfig; /*!< Program the FLASH User Option Byte: WWDG_SW / IWDG_SW / RST_STOP / RST_STDBY / + IWDG_FREEZE_STOP / IWDG_FREEZE_SANDBY / nDBANK / nDBOOT. + nDBANK / nDBOOT are only available for STM32F76xxx/STM32F77xxx devices */ + + uint32_t BootAddr0; /*!< Boot base address when Boot pin = 0. + This parameter can be a value of @ref FLASHEx_Boot_Address */ + + uint32_t BootAddr1; /*!< Boot base address when Boot pin = 1. + This parameter can be a value of @ref FLASHEx_Boot_Address */ + +#if defined (FLASH_OPTCR2_PCROP) + uint32_t PCROPSector; /*!< Set the PCROP sector. + This parameter can be a value of @ref FLASHEx_Option_Bytes_PCROP_Sectors */ + + uint32_t PCROPRdp; /*!< Set the PCROP_RDP option. + This parameter can be a value of @ref FLASHEx_Option_Bytes_PCROP_RDP */ +#endif /* FLASH_OPTCR2_PCROP */ + +} FLASH_OBProgramInitTypeDef; + +/** + * @} + */ +/* Exported constants --------------------------------------------------------*/ + +/** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants + * @{ + */ + +/** @defgroup FLASHEx_Type_Erase FLASH Type Erase + * @{ + */ +#define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00U) /*!< Sectors erase only */ +#define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01U) /*!< Flash Mass erase activation */ +/** + * @} + */ + +/** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range + * @{ + */ +#define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00U) /*!< Device operating range: 1.8V to 2.1V */ +#define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01U) /*!< Device operating range: 2.1V to 2.7V */ +#define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02U) /*!< Device operating range: 2.7V to 3.6V */ +#define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03U) /*!< Device operating range: 2.7V to 3.6V + External Vpp */ +/** + * @} + */ + +/** @defgroup FLASHEx_WRP_State FLASH WRP State + * @{ + */ +#define OB_WRPSTATE_DISABLE ((uint32_t)0x00U) /*!< Disable the write protection of the desired bank 1 sectors */ +#define OB_WRPSTATE_ENABLE ((uint32_t)0x01U) /*!< Enable the write protection of the desired bank 1 sectors */ +/** + * @} + */ + +/** @defgroup FLASHEx_Option_Type FLASH Option Type + * @{ + */ +#define OPTIONBYTE_WRP ((uint32_t)0x01U) /*!< WRP option byte configuration */ +#define OPTIONBYTE_RDP ((uint32_t)0x02U) /*!< RDP option byte configuration */ +#define OPTIONBYTE_USER ((uint32_t)0x04U) /*!< USER option byte configuration */ +#define OPTIONBYTE_BOR ((uint32_t)0x08U) /*!< BOR option byte configuration */ +#define OPTIONBYTE_BOOTADDR_0 ((uint32_t)0x10U) /*!< Boot 0 Address configuration */ +#define OPTIONBYTE_BOOTADDR_1 ((uint32_t)0x20U) /*!< Boot 1 Address configuration */ +#if defined (FLASH_OPTCR2_PCROP) +#define OPTIONBYTE_PCROP ((uint32_t)0x40U) /*!< PCROP configuration */ +#define OPTIONBYTE_PCROP_RDP ((uint32_t)0x80U) /*!< PCROP_RDP configuration */ +#endif /* FLASH_OPTCR2_PCROP */ +/** + * @} + */ + +/** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection + * @{ + */ +#define OB_RDP_LEVEL_0 ((uint8_t)0xAAU) +#define OB_RDP_LEVEL_1 ((uint8_t)0x55U) +#define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /*!< Warning: When enabling read protection level 2 + it s no more possible to go back to level 1 or 0 */ +/** + * @} + */ + +/** @defgroup FLASHEx_Option_Bytes_WWatchdog FLASH Option Bytes WWatchdog + * @{ + */ +#define OB_WWDG_SW ((uint32_t)0x10U) /*!< Software WWDG selected */ +#define OB_WWDG_HW ((uint32_t)0x00U) /*!< Hardware WWDG selected */ +/** + * @} + */ + + +/** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog + * @{ + */ +#define OB_IWDG_SW ((uint32_t)0x20U) /*!< Software IWDG selected */ +#define OB_IWDG_HW ((uint32_t)0x00U) /*!< Hardware IWDG selected */ +/** + * @} + */ + +/** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP + * @{ + */ +#define OB_STOP_NO_RST ((uint32_t)0x40U) /*!< No reset generated when entering in STOP */ +#define OB_STOP_RST ((uint32_t)0x00U) /*!< Reset generated when entering in STOP */ +/** + * @} + */ + +/** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY + * @{ + */ +#define OB_STDBY_NO_RST ((uint32_t)0x80U) /*!< No reset generated when entering in STANDBY */ +#define OB_STDBY_RST ((uint32_t)0x00U) /*!< Reset generated when entering in STANDBY */ +/** + * @} + */ + +/** @defgroup FLASHEx_Option_Bytes_IWDG_FREEZE_STOP FLASH IWDG Counter Freeze in STOP + * @{ + */ +#define OB_IWDG_STOP_FREEZE ((uint32_t)0x00000000U) /*!< Freeze IWDG counter in STOP mode */ +#define OB_IWDG_STOP_ACTIVE ((uint32_t)0x80000000U) /*!< IWDG counter active in STOP mode */ +/** + * @} + */ + +/** @defgroup FLASHEx_Option_Bytes_IWDG_FREEZE_SANDBY FLASH IWDG Counter Freeze in STANDBY + * @{ + */ +#define OB_IWDG_STDBY_FREEZE ((uint32_t)0x00000000U) /*!< Freeze IWDG counter in STANDBY mode */ +#define OB_IWDG_STDBY_ACTIVE ((uint32_t)0x40000000U) /*!< IWDG counter active in STANDBY mode */ +/** + * @} + */ + +/** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level + * @{ + */ +#define OB_BOR_LEVEL3 ((uint32_t)0x00U) /*!< Supply voltage ranges from 2.70 to 3.60 V */ +#define OB_BOR_LEVEL2 ((uint32_t)0x04U) /*!< Supply voltage ranges from 2.40 to 2.70 V */ +#define OB_BOR_LEVEL1 ((uint32_t)0x08U) /*!< Supply voltage ranges from 2.10 to 2.40 V */ +#define OB_BOR_OFF ((uint32_t)0x0CU) /*!< Supply voltage ranges from 1.62 to 2.10 V */ +/** + * @} + */ + +#if defined (FLASH_OPTCR_nDBOOT) +/** @defgroup FLASHEx_Option_Bytes_nDBOOT FLASH Option Bytes nDBOOT + * @{ + */ +#define OB_DUAL_BOOT_DISABLE ((uint32_t)0x10000000U) /* !< Dual Boot disable. Boot according to boot address option */ +#define OB_DUAL_BOOT_ENABLE ((uint32_t)0x00000000U) /* !< Dual Boot enable. Boot always from system memory if boot address in flash + (Dual bank Boot mode), or RAM if Boot address option in RAM */ +/** + * @} + */ +#endif /* FLASH_OPTCR_nDBOOT */ + +#if defined (FLASH_OPTCR_nDBANK) +/** @defgroup FLASHEx_Option_Bytes_nDBank FLASH Single Bank or Dual Bank + * @{ + */ +#define OB_NDBANK_SINGLE_BANK ((uint32_t)0x20000000U) /*!< NDBANK bit is set : Single Bank mode */ +#define OB_NDBANK_DUAL_BANK ((uint32_t)0x00000000U) /*!< NDBANK bit is reset : Dual Bank mode */ +/** + * @} + */ +#endif /* FLASH_OPTCR_nDBANK */ + +/** @defgroup FLASHEx_Boot_Address FLASH Boot Address + * @{ + */ +#define OB_BOOTADDR_ITCM_RAM ((uint32_t)0x0000U) /*!< Boot from ITCM RAM (0x00000000) */ +#define OB_BOOTADDR_SYSTEM ((uint32_t)0x0040U) /*!< Boot from System memory bootloader (0x00100000) */ +#define OB_BOOTADDR_ITCM_FLASH ((uint32_t)0x0080U) /*!< Boot from Flash on ITCM interface (0x00200000) */ +#define OB_BOOTADDR_AXIM_FLASH ((uint32_t)0x2000U) /*!< Boot from Flash on AXIM interface (0x08000000) */ +#define OB_BOOTADDR_DTCM_RAM ((uint32_t)0x8000U) /*!< Boot from DTCM RAM (0x20000000) */ +#define OB_BOOTADDR_SRAM1 ((uint32_t)0x8004U) /*!< Boot from SRAM1 (0x20010000) */ +#if (SRAM2_BASE == 0x2003C000U) +#define OB_BOOTADDR_SRAM2 ((uint32_t)0x800FU) /*!< Boot from SRAM2 (0x2003C000) */ +#else +#define OB_BOOTADDR_SRAM2 ((uint32_t)0x8013U) /*!< Boot from SRAM2 (0x2004C000) */ +#endif /* SRAM2_BASE == 0x2003C000U */ +/** + * @} + */ + +/** @defgroup FLASH_Latency FLASH Latency + * @{ + */ +#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ +#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ +#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ +#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ +#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ +#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ +#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ +#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ +#define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */ +#define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */ +#define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */ +#define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */ +#define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */ +#define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */ +#define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */ +#define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */ +/** + * @} + */ + +#if defined (FLASH_OPTCR_nDBANK) +/** @defgroup FLASHEx_Banks FLASH Banks + * @{ + */ +#define FLASH_BANK_1 ((uint32_t)0x01U) /*!< Bank 1 */ +#define FLASH_BANK_2 ((uint32_t)0x02U) /*!< Bank 2 */ +#define FLASH_BANK_BOTH ((uint32_t)(FLASH_BANK_1 | FLASH_BANK_2)) /*!< Bank1 and Bank2 */ +/** + * @} + */ +#endif /* FLASH_OPTCR_nDBANK */ + +/** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit + * @{ + */ +#if defined (FLASH_OPTCR_nDBANK) +#define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits */ +#else +#define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER bit */ +#endif /* FLASH_OPTCR_nDBANK */ +/** + * @} + */ + +/** @defgroup FLASHEx_Sectors FLASH Sectors + * @{ + */ +#if (FLASH_SECTOR_TOTAL == 24) +#define FLASH_SECTOR_8 ((uint32_t)8U) /*!< Sector Number 8 */ +#define FLASH_SECTOR_9 ((uint32_t)9U) /*!< Sector Number 9 */ +#define FLASH_SECTOR_10 ((uint32_t)10U) /*!< Sector Number 10 */ +#define FLASH_SECTOR_11 ((uint32_t)11U) /*!< Sector Number 11 */ +#define FLASH_SECTOR_12 ((uint32_t)12U) /*!< Sector Number 12 */ +#define FLASH_SECTOR_13 ((uint32_t)13U) /*!< Sector Number 13 */ +#define FLASH_SECTOR_14 ((uint32_t)14U) /*!< Sector Number 14 */ +#define FLASH_SECTOR_15 ((uint32_t)15U) /*!< Sector Number 15 */ +#define FLASH_SECTOR_16 ((uint32_t)16U) /*!< Sector Number 16 */ +#define FLASH_SECTOR_17 ((uint32_t)17U) /*!< Sector Number 17 */ +#define FLASH_SECTOR_18 ((uint32_t)18U) /*!< Sector Number 18 */ +#define FLASH_SECTOR_19 ((uint32_t)19U) /*!< Sector Number 19 */ +#define FLASH_SECTOR_20 ((uint32_t)20U) /*!< Sector Number 20 */ +#define FLASH_SECTOR_21 ((uint32_t)21U) /*!< Sector Number 21 */ +#define FLASH_SECTOR_22 ((uint32_t)22U) /*!< Sector Number 22 */ +#define FLASH_SECTOR_23 ((uint32_t)23U) /*!< Sector Number 23 */ +#endif /* FLASH_SECTOR_TOTAL == 24 */ +/** + * @} + */ + +#if (FLASH_SECTOR_TOTAL == 24) +/** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection + * @note For Single Bank mode, use OB_WRP_SECTOR_x defines: In fact, in FLASH_OPTCR register, + * nWRP[11:0] bits contain the value of the write-protection option bytes for sectors 0 to 11. + * For Dual Bank mode, use OB_WRP_DB_SECTOR_x defines: In fact, in FLASH_OPTCR register, + * nWRP[11:0] bits are divided on two groups, one group dedicated for bank 1 and + * a second one dedicated for bank 2 (nWRP[i] activates Write protection on sector 2*i and 2*i+1). + * This behavior is applicable only for STM32F76xxx / STM32F77xxx devices. + * @{ + */ +/* Single Bank Sectors */ +#define OB_WRP_SECTOR_0 ((uint32_t)0x00010000U) /*!< Write protection of Single Bank Sector0 */ +#define OB_WRP_SECTOR_1 ((uint32_t)0x00020000U) /*!< Write protection of Single Bank Sector1 */ +#define OB_WRP_SECTOR_2 ((uint32_t)0x00040000U) /*!< Write protection of Single Bank Sector2 */ +#define OB_WRP_SECTOR_3 ((uint32_t)0x00080000U) /*!< Write protection of Single Bank Sector3 */ +#define OB_WRP_SECTOR_4 ((uint32_t)0x00100000U) /*!< Write protection of Single Bank Sector4 */ +#define OB_WRP_SECTOR_5 ((uint32_t)0x00200000U) /*!< Write protection of Single Bank Sector5 */ +#define OB_WRP_SECTOR_6 ((uint32_t)0x00400000U) /*!< Write protection of Single Bank Sector6 */ +#define OB_WRP_SECTOR_7 ((uint32_t)0x00800000U) /*!< Write protection of Single Bank Sector7 */ +#define OB_WRP_SECTOR_8 ((uint32_t)0x01000000U) /*!< Write protection of Single Bank Sector8 */ +#define OB_WRP_SECTOR_9 ((uint32_t)0x02000000U) /*!< Write protection of Single Bank Sector9 */ +#define OB_WRP_SECTOR_10 ((uint32_t)0x04000000U) /*!< Write protection of Single Bank Sector10 */ +#define OB_WRP_SECTOR_11 ((uint32_t)0x08000000U) /*!< Write protection of Single Bank Sector11 */ +#define OB_WRP_SECTOR_All ((uint32_t)0x0FFF0000U) /*!< Write protection of all Sectors for Single Bank Flash */ + +/* Dual Bank Sectors */ +#define OB_WRP_DB_SECTOR_0 ((uint32_t)0x00010000U) /*!< Write protection of Dual Bank Sector0 */ +#define OB_WRP_DB_SECTOR_1 ((uint32_t)0x00010000U) /*!< Write protection of Dual Bank Sector1 */ +#define OB_WRP_DB_SECTOR_2 ((uint32_t)0x00020000U) /*!< Write protection of Dual Bank Sector2 */ +#define OB_WRP_DB_SECTOR_3 ((uint32_t)0x00020000U) /*!< Write protection of Dual Bank Sector3 */ +#define OB_WRP_DB_SECTOR_4 ((uint32_t)0x00040000U) /*!< Write protection of Dual Bank Sector4 */ +#define OB_WRP_DB_SECTOR_5 ((uint32_t)0x00040000U) /*!< Write protection of Dual Bank Sector5 */ +#define OB_WRP_DB_SECTOR_6 ((uint32_t)0x00080000U) /*!< Write protection of Dual Bank Sector6 */ +#define OB_WRP_DB_SECTOR_7 ((uint32_t)0x00080000U) /*!< Write protection of Dual Bank Sector7 */ +#define OB_WRP_DB_SECTOR_8 ((uint32_t)0x00100000U) /*!< Write protection of Dual Bank Sector8 */ +#define OB_WRP_DB_SECTOR_9 ((uint32_t)0x00100000U) /*!< Write protection of Dual Bank Sector9 */ +#define OB_WRP_DB_SECTOR_10 ((uint32_t)0x00200000U) /*!< Write protection of Dual Bank Sector10 */ +#define OB_WRP_DB_SECTOR_11 ((uint32_t)0x00200000U) /*!< Write protection of Dual Bank Sector11 */ +#define OB_WRP_DB_SECTOR_12 ((uint32_t)0x00400000U) /*!< Write protection of Dual Bank Sector12 */ +#define OB_WRP_DB_SECTOR_13 ((uint32_t)0x00400000U) /*!< Write protection of Dual Bank Sector13 */ +#define OB_WRP_DB_SECTOR_14 ((uint32_t)0x00800000U) /*!< Write protection of Dual Bank Sector14 */ +#define OB_WRP_DB_SECTOR_15 ((uint32_t)0x00800000U) /*!< Write protection of Dual Bank Sector15 */ +#define OB_WRP_DB_SECTOR_16 ((uint32_t)0x01000000U) /*!< Write protection of Dual Bank Sector16 */ +#define OB_WRP_DB_SECTOR_17 ((uint32_t)0x01000000U) /*!< Write protection of Dual Bank Sector17 */ +#define OB_WRP_DB_SECTOR_18 ((uint32_t)0x02000000U) /*!< Write protection of Dual Bank Sector18 */ +#define OB_WRP_DB_SECTOR_19 ((uint32_t)0x02000000U) /*!< Write protection of Dual Bank Sector19 */ +#define OB_WRP_DB_SECTOR_20 ((uint32_t)0x04000000U) /*!< Write protection of Dual Bank Sector20 */ +#define OB_WRP_DB_SECTOR_21 ((uint32_t)0x04000000U) /*!< Write protection of Dual Bank Sector21 */ +#define OB_WRP_DB_SECTOR_22 ((uint32_t)0x08000000U) /*!< Write protection of Dual Bank Sector22 */ +#define OB_WRP_DB_SECTOR_23 ((uint32_t)0x08000000U) /*!< Write protection of Dual Bank Sector23 */ +#define OB_WRP_DB_SECTOR_All ((uint32_t)0x0FFF0000U) /*!< Write protection of all Sectors for Dual Bank Flash */ +/** + * @} + */ +#endif /* FLASH_SECTOR_TOTAL == 24 */ + +#if (FLASH_SECTOR_TOTAL == 8) +/** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection + * @{ + */ +#define OB_WRP_SECTOR_0 ((uint32_t)0x00010000U) /*!< Write protection of Sector0 */ +#define OB_WRP_SECTOR_1 ((uint32_t)0x00020000U) /*!< Write protection of Sector1 */ +#define OB_WRP_SECTOR_2 ((uint32_t)0x00040000U) /*!< Write protection of Sector2 */ +#define OB_WRP_SECTOR_3 ((uint32_t)0x00080000U) /*!< Write protection of Sector3 */ +#define OB_WRP_SECTOR_4 ((uint32_t)0x00100000U) /*!< Write protection of Sector4 */ +#define OB_WRP_SECTOR_5 ((uint32_t)0x00200000U) /*!< Write protection of Sector5 */ +#define OB_WRP_SECTOR_6 ((uint32_t)0x00400000U) /*!< Write protection of Sector6 */ +#define OB_WRP_SECTOR_7 ((uint32_t)0x00800000U) /*!< Write protection of Sector7 */ +#define OB_WRP_SECTOR_All ((uint32_t)0x00FF0000U) /*!< Write protection of all Sectors */ +/** + * @} + */ +#endif /* FLASH_SECTOR_TOTAL == 8 */ + +#if defined (FLASH_OPTCR2_PCROP) +/** @defgroup FLASHEx_Option_Bytes_PCROP_Sectors FLASH Option Bytes PCROP Sectors + * @{ + */ +#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001U) /*!< PC Readout protection of Sector0 */ +#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002U) /*!< PC Readout protection of Sector1 */ +#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004U) /*!< PC Readout protection of Sector2 */ +#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008U) /*!< PC Readout protection of Sector3 */ +#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010U) /*!< PC Readout protection of Sector4 */ +#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020U) /*!< PC Readout protection of Sector5 */ +#define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040U) /*!< PC Readout protection of Sector6 */ +#define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080U) /*!< PC Readout protection of Sector7 */ +#define OB_PCROP_SECTOR_All ((uint32_t)0x000000FFU) /*!< PC Readout protection of all Sectors */ +/** + * @} + */ + +/** @defgroup FLASHEx_Option_Bytes_PCROP_RDP FLASH Option Bytes PCROP_RDP Bit + * @{ + */ +#define OB_PCROP_RDP_ENABLE ((uint32_t)0x80000000U) /*!< PCROP_RDP Enable */ +#define OB_PCROP_RDP_DISABLE ((uint32_t)0x00000000U) /*!< PCROP_RDP Disable */ +/** + * @} + */ +#endif /* FLASH_OPTCR2_PCROP */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup FLASH_Exported_Macros FLASH Exported Macros + * @{ + */ +/** + * @brief Calculate the FLASH Boot Base Adress (BOOT_ADD0 or BOOT_ADD1) + * @note Returned value BOOT_ADDx[15:0] corresponds to boot address [29:14]. + * @param __ADDRESS__: FLASH Boot Address (in the range 0x0000 0000 to 0x2004 FFFF with a granularity of 16KB) + * @retval The FLASH Boot Base Adress + */ +#define __HAL_FLASH_CALC_BOOT_BASE_ADR(__ADDRESS__) ((__ADDRESS__) >> 14) + /** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup FLASHEx_Exported_Functions + * @{ + */ + +/** @addtogroup FLASHEx_Exported_Functions_Group1 + * @{ + */ +/* Extension Program operation functions *************************************/ +HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError); +HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); +HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); +void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); + +/** + * @} + */ + +/** + * @} + */ +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/** @defgroup FLASHEx_Private_Macros FLASH Private Macros + * @{ + */ + +/** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters + * @{ + */ + +#define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ + ((VALUE) == FLASH_TYPEERASE_MASSERASE)) + +#define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \ + ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \ + ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \ + ((RANGE) == FLASH_VOLTAGE_RANGE_4)) + +#define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ + ((VALUE) == OB_WRPSTATE_ENABLE)) + +#if defined (FLASH_OPTCR2_PCROP) +#define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ + OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1 |\ + OPTIONBYTE_PCROP | OPTIONBYTE_PCROP_RDP))) +#else +#define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ + OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1))) +#endif /* FLASH_OPTCR2_PCROP */ + +#define IS_OB_BOOT_ADDRESS(ADDRESS) ((ADDRESS) <= 0x8013) + +#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ + ((LEVEL) == OB_RDP_LEVEL_1) ||\ + ((LEVEL) == OB_RDP_LEVEL_2)) + +#define IS_OB_WWDG_SOURCE(SOURCE) (((SOURCE) == OB_WWDG_SW) || ((SOURCE) == OB_WWDG_HW)) + +#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) + +#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) + +#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) + +#define IS_OB_IWDG_STOP_FREEZE(FREEZE) (((FREEZE) == OB_IWDG_STOP_FREEZE) || ((FREEZE) == OB_IWDG_STOP_ACTIVE)) + +#define IS_OB_IWDG_STDBY_FREEZE(FREEZE) (((FREEZE) == OB_IWDG_STDBY_FREEZE) || ((FREEZE) == OB_IWDG_STDBY_ACTIVE)) + +#define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ + ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) + +#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ + ((LATENCY) == FLASH_LATENCY_1) || \ + ((LATENCY) == FLASH_LATENCY_2) || \ + ((LATENCY) == FLASH_LATENCY_3) || \ + ((LATENCY) == FLASH_LATENCY_4) || \ + ((LATENCY) == FLASH_LATENCY_5) || \ + ((LATENCY) == FLASH_LATENCY_6) || \ + ((LATENCY) == FLASH_LATENCY_7) || \ + ((LATENCY) == FLASH_LATENCY_8) || \ + ((LATENCY) == FLASH_LATENCY_9) || \ + ((LATENCY) == FLASH_LATENCY_10) || \ + ((LATENCY) == FLASH_LATENCY_11) || \ + ((LATENCY) == FLASH_LATENCY_12) || \ + ((LATENCY) == FLASH_LATENCY_13) || \ + ((LATENCY) == FLASH_LATENCY_14) || \ + ((LATENCY) == FLASH_LATENCY_15)) + +#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) || \ + (((ADDRESS) >= FLASH_OTP_BASE) && ((ADDRESS) <= FLASH_OTP_END))) +#define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0U) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL)) + +#if (FLASH_SECTOR_TOTAL == 8) +#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ + ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ + ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ + ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7)) + +#define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & 0xFF00FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U)) +#endif /* FLASH_SECTOR_TOTAL == 8 */ + +#if (FLASH_SECTOR_TOTAL == 24) +#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ + ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ + ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ + ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ + ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ + ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\ + ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\ + ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\ + ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\ + ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\ + ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\ + ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23)) + +#define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & 0xF000FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U)) +#endif /* FLASH_SECTOR_TOTAL == 24 */ + +#if defined (FLASH_OPTCR_nDBANK) +#define IS_OB_NDBANK(VALUE) (((VALUE) == OB_NDBANK_SINGLE_BANK) || \ + ((VALUE) == OB_NDBANK_DUAL_BANK)) + +#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ + ((BANK) == FLASH_BANK_2) || \ + ((BANK) == FLASH_BANK_BOTH)) +#endif /* FLASH_OPTCR_nDBANK */ + +#if defined (FLASH_OPTCR_nDBOOT) +#define IS_OB_NDBOOT(VALUE) (((VALUE) == OB_DUAL_BOOT_DISABLE) || \ + ((VALUE) == OB_DUAL_BOOT_ENABLE)) +#endif /* FLASH_OPTCR_nDBOOT */ + +#if defined (FLASH_OPTCR2_PCROP) +#define IS_OB_PCROP_SECTOR(SECTOR) (((SECTOR) & (uint32_t)0xFFFFFF00U) == 0x00000000U) +#define IS_OB_PCROP_RDP_VALUE(VALUE) (((VALUE) == OB_PCROP_RDP_DISABLE) || \ + ((VALUE) == OB_PCROP_RDP_ENABLE)) +#endif /* FLASH_OPTCR2_PCROP */ + +/** + * @} + */ + +/** + * @} + */ + +/* Private functions ---------------------------------------------------------*/ +/** @defgroup FLASHEx_Private_Functions FLASH Private Functions + * @{ + */ +void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange); +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F7xx_HAL_FLASH_EX_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/35529b95/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h ---------------------------------------------------------------------- diff --git a/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h new file mode 100644 index 0000000..2749297 --- /dev/null +++ b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h @@ -0,0 +1,327 @@ +/** + ****************************************************************************** + * @file stm32f7xx_hal_gpio.h + * @author MCD Application Team + * @version V1.2.0 + * @date 30-December-2016 + * @brief Header file of GPIO HAL module. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F7xx_HAL_GPIO_H +#define __STM32F7xx_HAL_GPIO_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f7xx_hal_def.h" + +/** @addtogroup STM32F7xx_HAL_Driver + * @{ + */ + +/** @addtogroup GPIO + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup GPIO_Exported_Types GPIO Exported Types + * @{ + */ + +/** + * @brief GPIO Init structure definition + */ +typedef struct +{ + uint32_t Pin; /*!< Specifies the GPIO pins to be configured. + This parameter can be any value of @ref GPIO_pins_define */ + + uint32_t Mode; /*!< Specifies the operating mode for the selected pins. + This parameter can be a value of @ref GPIO_mode_define */ + + uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins. + This parameter can be a value of @ref GPIO_pull_define */ + + uint32_t Speed; /*!< Specifies the speed for the selected pins. + This parameter can be a value of @ref GPIO_speed_define */ + + uint32_t Alternate; /*!< Peripheral to be connected to the selected pins. + This parameter can be a value of @ref GPIO_Alternate_function_selection */ +}GPIO_InitTypeDef; + +/** + * @brief GPIO Bit SET and Bit RESET enumeration + */ +typedef enum +{ + GPIO_PIN_RESET = 0, + GPIO_PIN_SET +}GPIO_PinState; +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ + +/** @defgroup GPIO_Exported_Constants GPIO Exported Constants + * @{ + */ + +/** @defgroup GPIO_pins_define GPIO pins define + * @{ + */ +#define GPIO_PIN_0 ((uint16_t)0x0001U) /* Pin 0 selected */ +#define GPIO_PIN_1 ((uint16_t)0x0002U) /* Pin 1 selected */ +#define GPIO_PIN_2 ((uint16_t)0x0004U) /* Pin 2 selected */ +#define GPIO_PIN_3 ((uint16_t)0x0008U) /* Pin 3 selected */ +#define GPIO_PIN_4 ((uint16_t)0x0010U) /* Pin 4 selected */ +#define GPIO_PIN_5 ((uint16_t)0x0020U) /* Pin 5 selected */ +#define GPIO_PIN_6 ((uint16_t)0x0040U) /* Pin 6 selected */ +#define GPIO_PIN_7 ((uint16_t)0x0080U) /* Pin 7 selected */ +#define GPIO_PIN_8 ((uint16_t)0x0100U) /* Pin 8 selected */ +#define GPIO_PIN_9 ((uint16_t)0x0200U) /* Pin 9 selected */ +#define GPIO_PIN_10 ((uint16_t)0x0400U) /* Pin 10 selected */ +#define GPIO_PIN_11 ((uint16_t)0x0800U) /* Pin 11 selected */ +#define GPIO_PIN_12 ((uint16_t)0x1000U) /* Pin 12 selected */ +#define GPIO_PIN_13 ((uint16_t)0x2000U) /* Pin 13 selected */ +#define GPIO_PIN_14 ((uint16_t)0x4000U) /* Pin 14 selected */ +#define GPIO_PIN_15 ((uint16_t)0x8000U) /* Pin 15 selected */ +#define GPIO_PIN_All ((uint16_t)0xFFFFU) /* All pins selected */ + +#define GPIO_PIN_MASK ((uint32_t)0x0000FFFFU) /* PIN mask for assert test */ +/** + * @} + */ + +/** @defgroup GPIO_mode_define GPIO mode define + * @brief GPIO Configuration Mode + * Elements values convention: 0xX0yz00YZ + * - X : GPIO mode or EXTI Mode + * - y : External IT or Event trigger detection + * - z : IO configuration on External IT or Event + * - Y : Output type (Push Pull or Open Drain) + * - Z : IO Direction mode (Input, Output, Alternate or Analog) + * @{ + */ +#define GPIO_MODE_INPUT ((uint32_t)0x00000000U) /*!< Input Floating Mode */ +#define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001U) /*!< Output Push Pull Mode */ +#define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011U) /*!< Output Open Drain Mode */ +#define GPIO_MODE_AF_PP ((uint32_t)0x00000002U) /*!< Alternate Function Push Pull Mode */ +#define GPIO_MODE_AF_OD ((uint32_t)0x00000012U) /*!< Alternate Function Open Drain Mode */ + +#define GPIO_MODE_ANALOG ((uint32_t)0x00000003U) /*!< Analog Mode */ + +#define GPIO_MODE_IT_RISING ((uint32_t)0x10110000U) /*!< External Interrupt Mode with Rising edge trigger detection */ +#define GPIO_MODE_IT_FALLING ((uint32_t)0x10210000U) /*!< External Interrupt Mode with Falling edge trigger detection */ +#define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x10310000U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ + +#define GPIO_MODE_EVT_RISING ((uint32_t)0x10120000U) /*!< External Event Mode with Rising edge trigger detection */ +#define GPIO_MODE_EVT_FALLING ((uint32_t)0x10220000U) /*!< External Event Mode with Falling edge trigger detection */ +#define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x10320000U) /*!< External Event Mode with Rising/Falling edge trigger detection */ +/** + * @} + */ + +/** @defgroup GPIO_speed_define GPIO speed define + * @brief GPIO Output Maximum frequency + * @{ + */ +#define GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000U) /*!< Low speed */ +#define GPIO_SPEED_FREQ_MEDIUM ((uint32_t)0x00000001U) /*!< Medium speed */ +#define GPIO_SPEED_FREQ_HIGH ((uint32_t)0x00000002U) /*!< Fast speed */ +#define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)0x00000003U) /*!< High speed */ +/** + * @} + */ + + /** @defgroup GPIO_pull_define GPIO pull define + * @brief GPIO Pull-Up or Pull-Down Activation + * @{ + */ +#define GPIO_NOPULL ((uint32_t)0x00000000U) /*!< No Pull-up or Pull-down activation */ +#define GPIO_PULLUP ((uint32_t)0x00000001U) /*!< Pull-up activation */ +#define GPIO_PULLDOWN ((uint32_t)0x00000002U) /*!< Pull-down activation */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup GPIO_Exported_Macros GPIO Exported Macros + * @{ + */ + +/** + * @brief Checks whether the specified EXTI line flag is set or not. + * @param __EXTI_LINE__: specifies the EXTI line flag to check. + * This parameter can be GPIO_PIN_x where x can be(0..15) + * @retval The new state of __EXTI_LINE__ (SET or RESET). + */ +#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__)) + +/** + * @brief Clears the EXTI's line pending flags. + * @param __EXTI_LINE__: specifies the EXTI lines flags to clear. + * This parameter can be any combination of GPIO_PIN_x where x can be (0..15) + * @retval None + */ +#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__)) + +/** + * @brief Checks whether the specified EXTI line is asserted or not. + * @param __EXTI_LINE__: specifies the EXTI line to check. + * This parameter can be GPIO_PIN_x where x can be(0..15) + * @retval The new state of __EXTI_LINE__ (SET or RESET). + */ +#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__)) + +/** + * @brief Clears the EXTI's line pending bits. + * @param __EXTI_LINE__: specifies the EXTI lines to clear. + * This parameter can be any combination of GPIO_PIN_x where x can be (0..15) + * @retval None + */ +#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__)) + +/** + * @brief Generates a Software interrupt on selected EXTI line. + * @param __EXTI_LINE__: specifies the EXTI line to check. + * This parameter can be GPIO_PIN_x where x can be(0..15) + * @retval None + */ +#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__)) +/** + * @} + */ + +/* Include GPIO HAL Extension module */ +#include "stm32f7xx_hal_gpio_ex.h" + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup GPIO_Exported_Functions + * @{ + */ + +/** @addtogroup GPIO_Exported_Functions_Group1 + * @{ + */ +/* Initialization and de-initialization functions *****************************/ +void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init); +void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); +/** + * @} + */ + +/** @addtogroup GPIO_Exported_Functions_Group2 + * @{ + */ +/* IO operation functions *****************************************************/ +GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState); +void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin); +void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); + +/** + * @} + */ + +/** + * @} + */ +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/** @defgroup GPIO_Private_Constants GPIO Private Constants + * @{ + */ + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup GPIO_Private_Macros GPIO Private Macros + * @{ + */ +#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) +#define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00)) +#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ + ((MODE) == GPIO_MODE_OUTPUT_PP) ||\ + ((MODE) == GPIO_MODE_OUTPUT_OD) ||\ + ((MODE) == GPIO_MODE_AF_PP) ||\ + ((MODE) == GPIO_MODE_AF_OD) ||\ + ((MODE) == GPIO_MODE_IT_RISING) ||\ + ((MODE) == GPIO_MODE_IT_FALLING) ||\ + ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\ + ((MODE) == GPIO_MODE_EVT_RISING) ||\ + ((MODE) == GPIO_MODE_EVT_FALLING) ||\ + ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\ + ((MODE) == GPIO_MODE_ANALOG)) +#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_LOW) || ((SPEED) == GPIO_SPEED_MEDIUM) || \ + ((SPEED) == GPIO_SPEED_FAST) || ((SPEED) == GPIO_SPEED_HIGH)) +#define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \ + ((PULL) == GPIO_PULLDOWN)) +/** + * @} + */ + +/* Private functions ---------------------------------------------------------*/ +/** @defgroup GPIO_Private_Functions GPIO Private Functions + * @{ + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F7xx_HAL_GPIO_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/