http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.h ---------------------------------------------------------------------- diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.h deleted file mode 100755 index 62bae06..0000000 --- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.h +++ /dev/null @@ -1,105 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2005 by Dominic Rath <dominic.r...@gmx.de> * - * Copyright (C) 2007,2008 Ãyvind Harboe <oyvind.har...@zylin.com> * - * Copyright (C) 2008 by Spencer Oliver <s...@spen-soft.co.uk> * - * Copyright (C) 2009 Zachary T Welch <z...@superlucidity.net> * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - -#ifndef FLASH_NAND_DRIVER_H -#define FLASH_NAND_DRIVER_H - -struct nand_device; - -#define __NAND_DEVICE_COMMAND(name) \ - COMMAND_HELPER(name, struct nand_device *nand) - -/** - * Interface for NAND flash controllers. Not all of these functions are - * required for full functionality of the NAND driver, but better performance - * can be achieved by implementing each function. - */ -struct nand_flash_controller { - /** Driver name that is used to select it from configuration files. */ - const char *name; - - /** Usage of flash command registration. */ - const char *usage; - - const struct command_registration *commands; - - /** NAND device command called when driver is instantiated during configuration. */ - __NAND_DEVICE_COMMAND((*nand_device_command)); - - /** Initialize the NAND device. */ - int (*init)(struct nand_device *nand); - - /** Reset the NAND device. */ - int (*reset)(struct nand_device *nand); - - /** Issue a command to the NAND device. */ - int (*command)(struct nand_device *nand, uint8_t command); - - /** Write an address to the NAND device. */ - int (*address)(struct nand_device *nand, uint8_t address); - - /** Write word of data to the NAND device. */ - int (*write_data)(struct nand_device *nand, uint16_t data); - - /** Read word of data from the NAND device. */ - int (*read_data)(struct nand_device *nand, void *data); - - /** Write a block of data to the NAND device. */ - int (*write_block_data)(struct nand_device *nand, uint8_t *data, int size); - - /** Read a block of data from the NAND device. */ - int (*read_block_data)(struct nand_device *nand, uint8_t *data, int size); - - /** Write a page to the NAND device. */ - int (*write_page)(struct nand_device *nand, uint32_t page, uint8_t *data, - uint32_t data_size, uint8_t *oob, uint32_t oob_size); - - /** Read a page from the NAND device. */ - int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, - uint8_t *oob, uint32_t oob_size); - - /** Check if the NAND device is ready for more instructions with timeout. */ - int (*nand_ready)(struct nand_device *nand, int timeout); -}; - -#define NAND_DEVICE_COMMAND_HANDLER(name) static __NAND_DEVICE_COMMAND(name) - -/** - * Find a NAND flash controller by name. - * @param name Identifies the NAND controller to find. - * @returns The nand_flash_controller named @c name, or NULL if not found. - */ -struct nand_flash_controller *nand_driver_find_by_name(const char *name); - -/** Signature for callback functions passed to nand_driver_walk */ -typedef int (*nand_driver_walker_t)(struct nand_flash_controller *c, void *); -/** - * Walk the list of drivers, encapsulating the data structure type. - * Application state/context can be passed through the @c x pointer. - * @param f The callback function to invoke for each function. - * @param x For use as private data storate, passed directly to @c f. - * @returns ERROR_OK if successful, or the non-zero return value of @c f. - * This allows a walker to terminate the loop early. - */ -int nand_driver_walk(nand_driver_walker_t f, void *x); - -#endif /* FLASH_NAND_DRIVER_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc.c ---------------------------------------------------------------------- diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc.c deleted file mode 100755 index fba7b1c..0000000 --- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc.c +++ /dev/null @@ -1,183 +0,0 @@ -/* - * This file contains an ECC algorithm from Toshiba that allows for detection - * and correction of 1-bit errors in a 256 byte block of data. - * - * [ Extracted from the initial code found in some early Linux versions. - * The current Linux code is bigger while being faster, but this is of - * no real benefit when the bottleneck largely remains the JTAG link. ] - * - * Copyright (C) 2000-2004 Steven J. Hill (sjhill at realitydiluted.com) - * Toshiba America Electronics Components, Inc. - * - * Copyright (C) 2006 Thomas Gleixner <tglx at linutronix.de> - * - * This file is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 or (at your option) any - * later version. - * - * This file is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this file; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - * - * As a special exception, if other files instantiate templates or use - * macros or inline functions from these files, or you compile these - * files and link them with other works to produce a work based on these - * files, these files do not by themselves cause the resulting work to be - * covered by the GNU General Public License. However the source code for - * these files must still be made available in accordance with section (3) - * of the GNU General Public License. - * - * This exception does not invalidate any other reasons why a work based on - * this file might be covered by the GNU General Public License. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include "core.h" - -/* - * Pre-calculated 256-way 1 byte column parity - */ -static const uint8_t nand_ecc_precalc_table[] = { - 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00, - 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65, - 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66, - 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03, - 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69, - 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c, - 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f, - 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a, - 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a, - 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f, - 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c, - 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69, - 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03, - 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66, - 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65, - 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00 -}; - -/* - * nand_calculate_ecc - Calculate 3-byte ECC for 256-byte block - */ -int nand_calculate_ecc(struct nand_device *nand, const uint8_t *dat, uint8_t *ecc_code) -{ - uint8_t idx, reg1, reg2, reg3, tmp1, tmp2; - int i; - - /* Initialize variables */ - reg1 = reg2 = reg3 = 0; - - /* Build up column parity */ - for (i = 0; i < 256; i++) { - /* Get CP0 - CP5 from table */ - idx = nand_ecc_precalc_table[*dat++]; - reg1 ^= (idx & 0x3f); - - /* All bit XOR = 1 ? */ - if (idx & 0x40) { - reg3 ^= (uint8_t) i; - reg2 ^= ~((uint8_t) i); - } - } - - /* Create non-inverted ECC code from line parity */ - tmp1 = (reg3 & 0x80) >> 0; /* B7 -> B7 */ - tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */ - tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */ - tmp1 |= (reg2 & 0x40) >> 2; /* B6 -> B4 */ - tmp1 |= (reg3 & 0x20) >> 2; /* B5 -> B3 */ - tmp1 |= (reg2 & 0x20) >> 3; /* B5 -> B2 */ - tmp1 |= (reg3 & 0x10) >> 3; /* B4 -> B1 */ - tmp1 |= (reg2 & 0x10) >> 4; /* B4 -> B0 */ - - tmp2 = (reg3 & 0x08) << 4; /* B3 -> B7 */ - tmp2 |= (reg2 & 0x08) << 3; /* B3 -> B6 */ - tmp2 |= (reg3 & 0x04) << 3; /* B2 -> B5 */ - tmp2 |= (reg2 & 0x04) << 2; /* B2 -> B4 */ - tmp2 |= (reg3 & 0x02) << 2; /* B1 -> B3 */ - tmp2 |= (reg2 & 0x02) << 1; /* B1 -> B2 */ - tmp2 |= (reg3 & 0x01) << 1; /* B0 -> B1 */ - tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */ - - /* Calculate final ECC code */ -#ifdef NAND_ECC_SMC - ecc_code[0] = ~tmp2; - ecc_code[1] = ~tmp1; -#else - ecc_code[0] = ~tmp1; - ecc_code[1] = ~tmp2; -#endif - ecc_code[2] = ((~reg1) << 2) | 0x03; - - return 0; -} - -static inline int countbits(uint32_t b) -{ - int res = 0; - - for (; b; b >>= 1) - res += b & 0x01; - return res; -} - -/** - * nand_correct_data - Detect and correct a 1 bit error for 256 byte block - */ -int nand_correct_data(struct nand_device *nand, u_char *dat, - u_char *read_ecc, u_char *calc_ecc) -{ - uint8_t s0, s1, s2; - -#ifdef NAND_ECC_SMC - s0 = calc_ecc[0] ^ read_ecc[0]; - s1 = calc_ecc[1] ^ read_ecc[1]; - s2 = calc_ecc[2] ^ read_ecc[2]; -#else - s1 = calc_ecc[0] ^ read_ecc[0]; - s0 = calc_ecc[1] ^ read_ecc[1]; - s2 = calc_ecc[2] ^ read_ecc[2]; -#endif - if ((s0 | s1 | s2) == 0) - return 0; - - /* Check for a single bit error */ - if (((s0 ^ (s0 >> 1)) & 0x55) == 0x55 && - ((s1 ^ (s1 >> 1)) & 0x55) == 0x55 && - ((s2 ^ (s2 >> 1)) & 0x54) == 0x54) { - - uint32_t byteoffs, bitnum; - - byteoffs = (s1 << 0) & 0x80; - byteoffs |= (s1 << 1) & 0x40; - byteoffs |= (s1 << 2) & 0x20; - byteoffs |= (s1 << 3) & 0x10; - - byteoffs |= (s0 >> 4) & 0x08; - byteoffs |= (s0 >> 3) & 0x04; - byteoffs |= (s0 >> 2) & 0x02; - byteoffs |= (s0 >> 1) & 0x01; - - bitnum = (s2 >> 5) & 0x04; - bitnum |= (s2 >> 4) & 0x02; - bitnum |= (s2 >> 3) & 0x01; - - dat[byteoffs] ^= (1 << bitnum); - - return 1; - } - - if (countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 << 16)) == 1) - return 1; - - return -1; -} http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc_kw.c ---------------------------------------------------------------------- diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc_kw.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc_kw.c deleted file mode 100755 index 1c3cc70..0000000 --- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc_kw.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * Reed-Solomon ECC handling for the Marvell Kirkwood SOC - * Copyright (C) 2009 Marvell Semiconductor, Inc. - * - * Authors: Lennert Buytenhek <buyt...@wantstofly.org> - * Nicolas Pitre <n...@fluxnic.net> - * - * This file is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 or (at your option) any - * later version. - * - * This file is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include "core.h" - -/***************************************************************************** - * Arithmetic in GF(2^10) ("F") modulo x^10 + x^3 + 1. - * - * For multiplication, a discrete log/exponent table is used, with - * primitive element x (F is a primitive field, so x is primitive). - */ -#define MODPOLY 0x409 /* x^10 + x^3 + 1 in binary */ - -/* - * Maps an integer a [0..1022] to a polynomial b = gf_exp[a] in - * GF(2^10) mod x^10 + x^3 + 1 such that b = x ^ a. There's two - * identical copies of this array back-to-back so that we can save - * the mod 1023 operation when doing a GF multiplication. - */ -static uint16_t gf_exp[1023 + 1023]; - -/* - * Maps a polynomial b in GF(2^10) mod x^10 + x^3 + 1 to an index - * a = gf_log[b] in [0..1022] such that b = x ^ a. - */ -static uint16_t gf_log[1024]; - -static void gf_build_log_exp_table(void) -{ - int i; - int p_i; - - /* - * p_i = x ^ i - * - * Initialise to 1 for i = 0. - */ - p_i = 1; - - for (i = 0; i < 1023; i++) { - gf_exp[i] = p_i; - gf_exp[i + 1023] = p_i; - gf_log[p_i] = i; - - /* - * p_i = p_i * x - */ - p_i <<= 1; - if (p_i & (1 << 10)) - p_i ^= MODPOLY; - } -} - - -/***************************************************************************** - * Reed-Solomon code - * - * This implements a (1023,1015) Reed-Solomon ECC code over GF(2^10) - * mod x^10 + x^3 + 1, shortened to (520,512). The ECC data consists - * of 8 10-bit symbols, or 10 8-bit bytes. - * - * Given 512 bytes of data, computes 10 bytes of ECC. - * - * This is done by converting the 512 bytes to 512 10-bit symbols - * (elements of F), interpreting those symbols as a polynomial in F[X] - * by taking symbol 0 as the coefficient of X^8 and symbol 511 as the - * coefficient of X^519, and calculating the residue of that polynomial - * divided by the generator polynomial, which gives us the 8 ECC symbols - * as the remainder. Finally, we convert the 8 10-bit ECC symbols to 10 - * 8-bit bytes. - * - * The generator polynomial is hardcoded, as that is faster, but it - * can be computed by taking the primitive element a = x (in F), and - * constructing a polynomial in F[X] with roots a, a^2, a^3, ..., a^8 - * by multiplying the minimal polynomials for those roots (which are - * just 'x - a^i' for each i). - * - * Note: due to unfortunate circumstances, the bootrom in the Kirkwood SOC - * expects the ECC to be computed backward, i.e. from the last byte down - * to the first one. - */ -int nand_calculate_ecc_kw(struct nand_device *nand, const uint8_t *data, uint8_t *ecc) -{ - unsigned int r7, r6, r5, r4, r3, r2, r1, r0; - int i; - static int tables_initialized; - - if (!tables_initialized) { - gf_build_log_exp_table(); - tables_initialized = 1; - } - - /* - * Load bytes 504..511 of the data into r. - */ - r0 = data[504]; - r1 = data[505]; - r2 = data[506]; - r3 = data[507]; - r4 = data[508]; - r5 = data[509]; - r6 = data[510]; - r7 = data[511]; - - /* - * Shift bytes 503..0 (in that order) into r0, followed - * by eight zero bytes, while reducing the polynomial by the - * generator polynomial in every step. - */ - for (i = 503; i >= -8; i--) { - unsigned int d; - - d = 0; - if (i >= 0) - d = data[i]; - - if (r7) { - uint16_t *t = gf_exp + gf_log[r7]; - - r7 = r6 ^ t[0x21c]; - r6 = r5 ^ t[0x181]; - r5 = r4 ^ t[0x18e]; - r4 = r3 ^ t[0x25f]; - r3 = r2 ^ t[0x197]; - r2 = r1 ^ t[0x193]; - r1 = r0 ^ t[0x237]; - r0 = d ^ t[0x024]; - } else { - r7 = r6; - r6 = r5; - r5 = r4; - r4 = r3; - r3 = r2; - r2 = r1; - r1 = r0; - r0 = d; - } - } - - ecc[0] = r0; - ecc[1] = (r0 >> 8) | (r1 << 2); - ecc[2] = (r1 >> 6) | (r2 << 4); - ecc[3] = (r2 >> 4) | (r3 << 6); - ecc[4] = (r3 >> 2); - ecc[5] = r4; - ecc[6] = (r4 >> 8) | (r5 << 2); - ecc[7] = (r5 >> 6) | (r6 << 4); - ecc[8] = (r6 >> 4) | (r7 << 6); - ecc[9] = (r7 >> 2); - - return 0; -} http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.c ---------------------------------------------------------------------- diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.c deleted file mode 100755 index 085e4af..0000000 --- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.c +++ /dev/null @@ -1,228 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2007 by Dominic Rath <dominic.r...@gmx.de> * - * Copyright (C) 2002 Thomas Gleixner <t...@linutronix.de> * - * Copyright (C) 2009 Zachary T Welch <z...@superlucidity.net> * - * * - * Partially based on drivers/mtd/nand_ids.c from Linux. * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include "core.h" -#include "fileio.h" - -static struct nand_ecclayout nand_oob_16 = { - .eccbytes = 6, - .eccpos = {0, 1, 2, 3, 6, 7}, - .oobfree = { - {.offset = 8, - .length = 8} - } -}; - -static struct nand_ecclayout nand_oob_64 = { - .eccbytes = 24, - .eccpos = { - 40, 41, 42, 43, 44, 45, 46, 47, - 48, 49, 50, 51, 52, 53, 54, 55, - 56, 57, 58, 59, 60, 61, 62, 63 - }, - .oobfree = { - {.offset = 2, - .length = 38} - } -}; - -void nand_fileio_init(struct nand_fileio_state *state) -{ - memset(state, 0, sizeof(*state)); - state->oob_format = NAND_OOB_NONE; -} - -int nand_fileio_start(struct command_context *cmd_ctx, - struct nand_device *nand, const char *filename, int filemode, - struct nand_fileio_state *state) -{ - if (state->address % nand->page_size) { - command_print(cmd_ctx, "only page-aligned addresses are supported"); - return ERROR_COMMAND_SYNTAX_ERROR; - } - - duration_start(&state->bench); - - if (NULL != filename) { - int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY); - if (ERROR_OK != retval) { - const char *msg = (FILEIO_READ == filemode) ? "read" : "write"; - command_print(cmd_ctx, "failed to open '%s' for %s access", - filename, msg); - return retval; - } - state->file_opened = true; - } - - if (!(state->oob_format & NAND_OOB_ONLY)) { - state->page_size = nand->page_size; - state->page = malloc(nand->page_size); - } - - if (state->oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW)) { - if (nand->page_size == 512) { - state->oob_size = 16; - state->eccpos = nand_oob_16.eccpos; - } else if (nand->page_size == 2048) { - state->oob_size = 64; - state->eccpos = nand_oob_64.eccpos; - } - state->oob = malloc(state->oob_size); - } - - return ERROR_OK; -} -int nand_fileio_cleanup(struct nand_fileio_state *state) -{ - if (state->file_opened) - fileio_close(state->fileio); - - if (state->oob) { - free(state->oob); - state->oob = NULL; - } - if (state->page) { - free(state->page); - state->page = NULL; - } - return ERROR_OK; -} -int nand_fileio_finish(struct nand_fileio_state *state) -{ - nand_fileio_cleanup(state); - return duration_measure(&state->bench); -} - -COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, - struct nand_device **dev, enum fileio_access filemode, - bool need_size, bool sw_ecc) -{ - nand_fileio_init(state); - - unsigned minargs = need_size ? 4 : 3; - if (CMD_ARGC < minargs) - return ERROR_COMMAND_SYNTAX_ERROR; - - struct nand_device *nand; - int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand); - if (ERROR_OK != retval) - return retval; - - if (NULL == nand->device) { - command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]); - return ERROR_OK; - } - - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], state->address); - if (need_size) { - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size); - if (state->size % nand->page_size) { - command_print(CMD_CTX, "only page-aligned sizes are supported"); - return ERROR_COMMAND_SYNTAX_ERROR; - } - } - - if (CMD_ARGC > minargs) { - for (unsigned i = minargs; i < CMD_ARGC; i++) { - if (!strcmp(CMD_ARGV[i], "oob_raw")) - state->oob_format |= NAND_OOB_RAW; - else if (!strcmp(CMD_ARGV[i], "oob_only")) - state->oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; - else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc")) - state->oob_format |= NAND_OOB_SW_ECC; - else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc_kw")) - state->oob_format |= NAND_OOB_SW_ECC_KW; - else { - command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]); - return ERROR_COMMAND_SYNTAX_ERROR; - } - } - } - - retval = nand_fileio_start(CMD_CTX, nand, CMD_ARGV[1], filemode, state); - if (ERROR_OK != retval) - return retval; - - if (!need_size) { - size_t filesize; - retval = fileio_size(state->fileio, &filesize); - if (retval != ERROR_OK) - return retval; - state->size = filesize; - } - - *dev = nand; - - return ERROR_OK; -} - -/** - * @returns If no error occurred, returns number of bytes consumed; - * otherwise, returns a negative error code.) - */ -int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s) -{ - size_t total_read = 0; - size_t one_read; - - if (NULL != s->page) { - fileio_read(s->fileio, s->page_size, s->page, &one_read); - if (one_read < s->page_size) - memset(s->page + one_read, 0xff, s->page_size - one_read); - total_read += one_read; - } - - if (s->oob_format & NAND_OOB_SW_ECC) { - uint8_t ecc[3]; - memset(s->oob, 0xff, s->oob_size); - for (uint32_t i = 0, j = 0; i < s->page_size; i += 256) { - nand_calculate_ecc(nand, s->page + i, ecc); - s->oob[s->eccpos[j++]] = ecc[0]; - s->oob[s->eccpos[j++]] = ecc[1]; - s->oob[s->eccpos[j++]] = ecc[2]; - } - } else if (s->oob_format & NAND_OOB_SW_ECC_KW) { - /* - * In this case eccpos is not used as - * the ECC data is always stored contigously - * at the end of the OOB area. It consists - * of 10 bytes per 512-byte data block. - */ - uint8_t *ecc = s->oob + s->oob_size - s->page_size / 512 * 10; - memset(s->oob, 0xff, s->oob_size); - for (uint32_t i = 0; i < s->page_size; i += 512) { - nand_calculate_ecc_kw(nand, s->page + i, ecc); - ecc += 10; - } - } else if (NULL != s->oob) { - fileio_read(s->fileio, s->oob_size, s->oob, &one_read); - if (one_read < s->oob_size) - memset(s->oob + one_read, 0xff, s->oob_size - one_read); - total_read += one_read; - } - return total_read; -} http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.h ---------------------------------------------------------------------- diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.h deleted file mode 100755 index f0483a7..0000000 --- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.h +++ /dev/null @@ -1,58 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2009 Zachary T Welch <z...@superlucidity.net> * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - -#ifndef FLASH_NAND_FILEIO_H -#define FLASH_NAND_FILEIO_H - -#include <helper/time_support.h> -#include <helper/fileio.h> - -struct nand_fileio_state { - uint32_t address; - uint32_t size; - - uint8_t *page; - uint32_t page_size; - - enum oob_formats oob_format; - uint8_t *oob; - uint32_t oob_size; - - const int *eccpos; - - bool file_opened; - struct fileio *fileio; - - struct duration bench; -}; - -void nand_fileio_init(struct nand_fileio_state *state); -int nand_fileio_start(struct command_context *cmd_ctx, - struct nand_device *nand, const char *filename, int filemode, - struct nand_fileio_state *state); -int nand_fileio_cleanup(struct nand_fileio_state *state); -int nand_fileio_finish(struct nand_fileio_state *state); - -COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, - struct nand_device **dev, enum fileio_access filemode, - bool need_size, bool sw_ecc); - -int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s); - -#endif /* FLASH_NAND_FILEIO_H */ http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/imp.h ---------------------------------------------------------------------- diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/imp.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/imp.h deleted file mode 100755 index dde17cb..0000000 --- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/imp.h +++ /dev/null @@ -1,40 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2009 Zachary T Welch <z...@superlucidity.net> * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - -#ifndef FLASH_NAND_IMP_H -#define FLASH_NAND_IMP_H - -#include "core.h" -#include "driver.h" - -void nand_device_add(struct nand_device *c); - -int nand_write_page(struct nand_device *nand, - uint32_t page, uint8_t *data, uint32_t data_size, - uint8_t *oob, uint32_t oob_size); - -int nand_read_page(struct nand_device *nand, uint32_t page, - uint8_t *data, uint32_t data_size, - uint8_t *oob, uint32_t oob_size); - -int nand_probe(struct nand_device *nand); -int nand_erase(struct nand_device *nand, int first_block, int last_block); -int nand_build_bbt(struct nand_device *nand, int first, int last); - -#endif /* FLASH_NAND_IMP_H */ http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.c ---------------------------------------------------------------------- diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.c deleted file mode 100755 index ff02ffa..0000000 --- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.c +++ /dev/null @@ -1,1361 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2007 by Dominic Rath * - * dominic.r...@gmx.de * - * - * Copyright (C) 2010 richard vegh <vegh.ri...@gmail.com> * - * Copyright (C) 2010 Oyvind Harboe <oyvind.har...@zylin.com> * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include "imp.h" -#include "lpc3180.h" -#include <target/target.h> - -static int lpc3180_reset(struct nand_device *nand); -static int lpc3180_controller_ready(struct nand_device *nand, int timeout); -static int lpc3180_tc_ready(struct nand_device *nand, int timeout); - -#define ECC_OFFS 0x120 -#define SPARE_OFFS 0x140 -#define DATA_OFFS 0x200 - -/* nand device lpc3180 <target#> <oscillator_frequency> - */ -NAND_DEVICE_COMMAND_HANDLER(lpc3180_nand_device_command) -{ - if (CMD_ARGC < 3) - return ERROR_COMMAND_SYNTAX_ERROR; - - uint32_t osc_freq; - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], osc_freq); - - struct lpc3180_nand_controller *lpc3180_info; - lpc3180_info = malloc(sizeof(struct lpc3180_nand_controller)); - nand->controller_priv = lpc3180_info; - - lpc3180_info->osc_freq = osc_freq; - - if ((lpc3180_info->osc_freq < 1000) || (lpc3180_info->osc_freq > 20000)) - LOG_WARNING( - "LPC3180 oscillator frequency should be between 1000 and 20000 kHz, was %i", - lpc3180_info->osc_freq); - lpc3180_info->selected_controller = LPC3180_NO_CONTROLLER; - lpc3180_info->sw_write_protection = 0; - lpc3180_info->sw_wp_lower_bound = 0x0; - lpc3180_info->sw_wp_upper_bound = 0x0; - - return ERROR_OK; -} - -static int lpc3180_pll(int fclkin, uint32_t pll_ctrl) -{ - int bypass = (pll_ctrl & 0x8000) >> 15; - int direct = (pll_ctrl & 0x4000) >> 14; - int feedback = (pll_ctrl & 0x2000) >> 13; - int p = (1 << ((pll_ctrl & 0x1800) >> 11) * 2); - int n = ((pll_ctrl & 0x0600) >> 9) + 1; - int m = ((pll_ctrl & 0x01fe) >> 1) + 1; - int lock = (pll_ctrl & 0x1); - - if (!lock) - LOG_WARNING("PLL is not locked"); - - if (!bypass && direct) /* direct mode */ - return (m * fclkin) / n; - - if (bypass && !direct) /* bypass mode */ - return fclkin / (2 * p); - - if (bypass & direct) /* direct bypass mode */ - return fclkin; - - if (feedback) /* integer mode */ - return m * (fclkin / n); - else /* non-integer mode */ - return (m / (2 * p)) * (fclkin / n); -} - -static float lpc3180_cycle_time(struct nand_device *nand) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - uint32_t sysclk_ctrl, pwr_ctrl, hclkdiv_ctrl, hclkpll_ctrl; - int sysclk; - int hclk; - int hclk_pll; - float cycle; - - /* calculate timings */ - - /* determine current SYSCLK (13'MHz or main oscillator) */ - target_read_u32(target, 0x40004050, &sysclk_ctrl); - - if ((sysclk_ctrl & 1) == 0) - sysclk = lpc3180_info->osc_freq; - else - sysclk = 13000; - - /* determine selected HCLK source */ - target_read_u32(target, 0x40004044, &pwr_ctrl); - - if ((pwr_ctrl & (1 << 2)) == 0) /* DIRECT RUN mode */ - hclk = sysclk; - else { - target_read_u32(target, 0x40004058, &hclkpll_ctrl); - hclk_pll = lpc3180_pll(sysclk, hclkpll_ctrl); - - target_read_u32(target, 0x40004040, &hclkdiv_ctrl); - - if (pwr_ctrl & (1 << 10)) /* ARM_CLK and HCLK use PERIPH_CLK */ - hclk = hclk_pll / (((hclkdiv_ctrl & 0x7c) >> 2) + 1); - else /* HCLK uses HCLK_PLL */ - hclk = hclk_pll / (1 << (hclkdiv_ctrl & 0x3)); - } - - LOG_DEBUG("LPC3180 HCLK currently clocked at %i kHz", hclk); - - cycle = (1.0 / hclk) * 1000000.0; - - return cycle; -} - -static int lpc3180_init(struct nand_device *nand) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - int bus_width = nand->bus_width ? : 8; - int address_cycles = nand->address_cycles ? : 3; - int page_size = nand->page_size ? : 512; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - /* sanitize arguments */ - if ((bus_width != 8) && (bus_width != 16)) { - LOG_ERROR("LPC3180 only supports 8 or 16 bit bus width, not %i", bus_width); - return ERROR_NAND_OPERATION_NOT_SUPPORTED; - } - - /* The LPC3180 only brings out 8 bit NAND data bus, but the controller - * would support 16 bit, too, so we just warn about this for now - */ - if (bus_width == 16) - LOG_WARNING("LPC3180 only supports 8 bit bus width"); - - /* inform calling code about selected bus width */ - nand->bus_width = bus_width; - - if ((address_cycles != 3) && (address_cycles != 4)) { - LOG_ERROR("LPC3180 only supports 3 or 4 address cycles, not %i", address_cycles); - return ERROR_NAND_OPERATION_NOT_SUPPORTED; - } - - if ((page_size != 512) && (page_size != 2048)) { - LOG_ERROR("LPC3180 only supports 512 or 2048 byte pages, not %i", page_size); - return ERROR_NAND_OPERATION_NOT_SUPPORTED; - } - - /* select MLC controller if none is currently selected */ - if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - LOG_DEBUG("no LPC3180 NAND flash controller selected, using default 'mlc'"); - lpc3180_info->selected_controller = LPC3180_MLC_CONTROLLER; - } - - if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - uint32_t mlc_icr_value = 0x0; - float cycle; - int twp, twh, trp, treh, trhz, trbwb, tcea; - - /* FLASHCLK_CTRL = 0x22 (enable clock for MLC flash controller) */ - target_write_u32(target, 0x400040c8, 0x22); - - /* MLC_CEH = 0x0 (Force nCE assert) */ - target_write_u32(target, 0x200b804c, 0x0); - - /* MLC_LOCK = 0xa25e (unlock protected registers) */ - target_write_u32(target, 0x200b8044, 0xa25e); - - /* MLC_ICR = configuration */ - if (lpc3180_info->sw_write_protection) - mlc_icr_value |= 0x8; - if (page_size == 2048) - mlc_icr_value |= 0x4; - if (address_cycles == 4) - mlc_icr_value |= 0x2; - if (bus_width == 16) - mlc_icr_value |= 0x1; - target_write_u32(target, 0x200b8030, mlc_icr_value); - - /* calculate NAND controller timings */ - cycle = lpc3180_cycle_time(nand); - - twp = ((40 / cycle) + 1); - twh = ((20 / cycle) + 1); - trp = ((30 / cycle) + 1); - treh = ((15 / cycle) + 1); - trhz = ((30 / cycle) + 1); - trbwb = ((100 / cycle) + 1); - tcea = ((45 / cycle) + 1); - - /* MLC_LOCK = 0xa25e (unlock protected registers) */ - target_write_u32(target, 0x200b8044, 0xa25e); - - /* MLC_TIME_REG */ - target_write_u32(target, 0x200b8034, (twp & 0xf) | ((twh & 0xf) << 4) | - ((trp & 0xf) << 8) | ((treh & 0xf) << 12) | ((trhz & 0x7) << 16) | - ((trbwb & 0x1f) << 19) | ((tcea & 0x3) << 24)); - - lpc3180_reset(nand); - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - float cycle; - int r_setup, r_hold, r_width, r_rdy; - int w_setup, w_hold, w_width, w_rdy; - - /* FLASHCLK_CTRL = 0x05 (enable clock for SLC flash controller) */ - target_write_u32(target, 0x400040c8, 0x05); - - /* after reset set other registers of SLC so reset calling is here at the begining*/ - lpc3180_reset(nand); - - /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled, - *DMA read from SLC, WIDTH = bus_width) */ - target_write_u32(target, 0x20020014, 0x3e | (bus_width == 16) ? 1 : 0); - - /* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */ - target_write_u32(target, 0x20020020, 0x03); - - /* DMA configuration - * DMACLK_CTRL = 0x01 (enable clock for DMA controller) */ - target_write_u32(target, 0x400040e8, 0x01); - /* DMACConfig = DMA enabled*/ - target_write_u32(target, 0x31000030, 0x01); - - - /* calculate NAND controller timings */ - cycle = lpc3180_cycle_time(nand); - - r_setup = w_setup = 0; - r_hold = w_hold = 10 / cycle; - r_width = 30 / cycle; - w_width = 40 / cycle; - r_rdy = w_rdy = 100 / cycle; - - /* SLC_TAC: SLC timing arcs register */ - target_write_u32(target, 0x2002002c, (r_setup & 0xf) | ((r_hold & 0xf) << 4) | - ((r_width & 0xf) << 8) | ((r_rdy & 0xf) << 12) | ((w_setup & 0xf) << 16) | - ((w_hold & 0xf) << 20) | ((w_width & 0xf) << 24) | ((w_rdy & 0xf) << 28)); - - } - - return ERROR_OK; -} - -static int lpc3180_reset(struct nand_device *nand) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); - return ERROR_NAND_OPERATION_FAILED; - } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - /* MLC_CMD = 0xff (reset controller and NAND device) */ - target_write_u32(target, 0x200b8000, 0xff); - - if (!lpc3180_controller_ready(nand, 100)) { - LOG_ERROR("LPC3180 NAND controller timed out after reset"); - return ERROR_NAND_OPERATION_TIMEOUT; - } - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - /* SLC_CTRL = 0x6 (ECC_CLEAR, SW_RESET) */ - target_write_u32(target, 0x20020010, 0x6); - - if (!lpc3180_controller_ready(nand, 100)) { - LOG_ERROR("LPC3180 NAND controller timed out after reset"); - return ERROR_NAND_OPERATION_TIMEOUT; - } - } - - return ERROR_OK; -} - -static int lpc3180_command(struct nand_device *nand, uint8_t command) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); - return ERROR_NAND_OPERATION_FAILED; - } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - /* MLC_CMD = command */ - target_write_u32(target, 0x200b8000, command); - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - /* SLC_CMD = command */ - target_write_u32(target, 0x20020008, command); - } - - return ERROR_OK; -} - -static int lpc3180_address(struct nand_device *nand, uint8_t address) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); - return ERROR_NAND_OPERATION_FAILED; - } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - /* MLC_ADDR = address */ - target_write_u32(target, 0x200b8004, address); - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - /* SLC_ADDR = address */ - target_write_u32(target, 0x20020004, address); - } - - return ERROR_OK; -} - -static int lpc3180_write_data(struct nand_device *nand, uint16_t data) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); - return ERROR_NAND_OPERATION_FAILED; - } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - /* MLC_DATA = data */ - target_write_u32(target, 0x200b0000, data); - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - /* SLC_DATA = data */ - target_write_u32(target, 0x20020000, data); - } - - return ERROR_OK; -} - -static int lpc3180_read_data(struct nand_device *nand, void *data) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); - return ERROR_NAND_OPERATION_FAILED; - } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - /* data = MLC_DATA, use sized access */ - if (nand->bus_width == 8) { - uint8_t *data8 = data; - target_read_u8(target, 0x200b0000, data8); - } else if (nand->bus_width == 16) { - uint16_t *data16 = data; - target_read_u16(target, 0x200b0000, data16); - } else { - LOG_ERROR("BUG: bus_width neither 8 nor 16 bit"); - return ERROR_NAND_OPERATION_FAILED; - } - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - uint32_t data32; - - /* data = SLC_DATA, must use 32-bit access */ - target_read_u32(target, 0x20020000, &data32); - - if (nand->bus_width == 8) { - uint8_t *data8 = data; - *data8 = data32 & 0xff; - } else if (nand->bus_width == 16) { - uint16_t *data16 = data; - *data16 = data32 & 0xffff; - } else { - LOG_ERROR("BUG: bus_width neither 8 nor 16 bit"); - return ERROR_NAND_OPERATION_FAILED; - } - } - - return ERROR_OK; -} - -static int lpc3180_write_page(struct nand_device *nand, - uint32_t page, - uint8_t *data, - uint32_t data_size, - uint8_t *oob, - uint32_t oob_size) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - int retval; - uint8_t status; - uint8_t *page_buffer; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); - return ERROR_NAND_OPERATION_FAILED; - } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - uint8_t *oob_buffer; - int quarter, num_quarters; - - if (!data && oob) { - LOG_ERROR("LPC3180 MLC controller can't write OOB data only"); - return ERROR_NAND_OPERATION_NOT_SUPPORTED; - } - - if (oob && (oob_size > 24)) { - LOG_ERROR("LPC3180 MLC controller can't write more " - "than 6 bytes for each quarter's OOB data"); - return ERROR_NAND_OPERATION_NOT_SUPPORTED; - } - - if (data_size > (uint32_t)nand->page_size) { - LOG_ERROR("data size exceeds page size"); - return ERROR_NAND_OPERATION_NOT_SUPPORTED; - } - - /* MLC_CMD = sequential input */ - target_write_u32(target, 0x200b8000, NAND_CMD_SEQIN); - - page_buffer = malloc(512); - oob_buffer = malloc(6); - - if (nand->page_size == 512) { - /* MLC_ADDR = 0x0 (one column cycle) */ - target_write_u32(target, 0x200b8004, 0x0); - - /* MLC_ADDR = row */ - target_write_u32(target, 0x200b8004, page & 0xff); - target_write_u32(target, 0x200b8004, (page >> 8) & 0xff); - - if (nand->address_cycles == 4) - target_write_u32(target, 0x200b8004, (page >> 16) & 0xff); - } else { - /* MLC_ADDR = 0x0 (two column cycles) */ - target_write_u32(target, 0x200b8004, 0x0); - target_write_u32(target, 0x200b8004, 0x0); - - /* MLC_ADDR = row */ - target_write_u32(target, 0x200b8004, page & 0xff); - target_write_u32(target, 0x200b8004, (page >> 8) & 0xff); - } - - /* when using the MLC controller, we have to treat a large page device - * as being made out of four quarters, each the size of a small page device - */ - num_quarters = (nand->page_size == 2048) ? 4 : 1; - - for (quarter = 0; quarter < num_quarters; quarter++) { - int thisrun_data_size = (data_size > 512) ? 512 : data_size; - int thisrun_oob_size = (oob_size > 6) ? 6 : oob_size; - - memset(page_buffer, 0xff, 512); - if (data) { - memcpy(page_buffer, data, thisrun_data_size); - data_size -= thisrun_data_size; - data += thisrun_data_size; - } - - memset(oob_buffer, 0xff, 6); - if (oob) { - memcpy(oob_buffer, oob, thisrun_oob_size); - oob_size -= thisrun_oob_size; - oob += thisrun_oob_size; - } - - /* write MLC_ECC_ENC_REG to start encode cycle */ - target_write_u32(target, 0x200b8008, 0x0); - - target_write_memory(target, 0x200a8000, - 4, 128, page_buffer); - target_write_memory(target, 0x200a8000, - 1, 6, oob_buffer); - - /* write MLC_ECC_AUTO_ENC_REG to start auto encode */ - target_write_u32(target, 0x200b8010, 0x0); - - if (!lpc3180_controller_ready(nand, 1000)) { - LOG_ERROR("timeout while waiting for completion of auto encode cycle"); - free(page_buffer); - free(oob_buffer); - return ERROR_NAND_OPERATION_FAILED; - } - } - - /* MLC_CMD = auto program command */ - target_write_u32(target, 0x200b8000, NAND_CMD_PAGEPROG); - - retval = nand_read_status(nand, &status); - if (retval != ERROR_OK) { - LOG_ERROR("couldn't read status"); - free(page_buffer); - free(oob_buffer); - return ERROR_NAND_OPERATION_FAILED; - } - - if (status & NAND_STATUS_FAIL) { - LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status); - free(page_buffer); - free(oob_buffer); - return ERROR_NAND_OPERATION_FAILED; - } - - free(page_buffer); - free(oob_buffer); - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - - /********************************************************************** - * Write both SLC NAND flash page main area and spare area. - * Small page - - * ------------------------------------------ - * | 512 bytes main | 16 bytes spare | - * ------------------------------------------ - * Large page - - * ------------------------------------------ - * | 2048 bytes main | 64 bytes spare | - * ------------------------------------------ - * If DMA & ECC enabled, then the ECC generated for the 1st 256-byte - * data is written to the 3rd word of the spare area. The ECC - * generated for the 2nd 256-byte data is written to the 4th word - * of the spare area. The ECC generated for the 3rd 256-byte data is - * written to the 7th word of the spare area. The ECC generated - * for the 4th 256-byte data is written to the 8th word of the - * spare area and so on. - * - **********************************************************************/ - - int i = 0, target_mem_base; - uint8_t *ecc_flash_buffer; - struct working_area *pworking_area; - - if (lpc3180_info->is_bulk) { - - if (!data && oob) { - /*if oob only mode is active original method is used as SLC - *controller hangs during DMA interworking. Anyway the code supports - *the oob only mode below. */ - return nand_write_page_raw(nand, - page, - data, - data_size, - oob, - oob_size); - } - retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data); - if (ERROR_OK != retval) - return retval; - - /* allocate a working area */ - if (target->working_area_size < (uint32_t) nand->page_size + 0x200) { - LOG_ERROR("Reserve at least 0x%x physical target working area", - nand->page_size + 0x200); - return ERROR_FLASH_OPERATION_FAILED; - } - if (target->working_area_phys%4) { - LOG_ERROR( - "Reserve the physical target working area at word boundary"); - return ERROR_FLASH_OPERATION_FAILED; - } - if (target_alloc_working_area(target, target->working_area_size, - &pworking_area) != ERROR_OK) { - LOG_ERROR("no working area specified, can't read LPC internal flash"); - return ERROR_FLASH_OPERATION_FAILED; - } - target_mem_base = target->working_area_phys; - - if (nand->page_size == 2048) - page_buffer = malloc(2048); - else - page_buffer = malloc(512); - - ecc_flash_buffer = malloc(64); - - /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst - *enabled, DMA write to SLC, WIDTH = bus_width) */ - target_write_u32(target, 0x20020014, 0x3c); - - if (data && !oob) { - /* set DMA LLI-s in target memory and in DMA*/ - for (i = 0; i < nand->page_size/0x100; i++) { - - int tmp; - /* -------LLI for 256 byte block--------- - * DMACC0SrcAddr = SRAM */ - target_write_u32(target, - target_mem_base+0+i*32, - target_mem_base+DATA_OFFS+i*256); - if (i == 0) - target_write_u32(target, - 0x31000100, - target_mem_base+DATA_OFFS); - /* DMACCxDestAddr = SLC_DMA_DATA */ - target_write_u32(target, target_mem_base+4+i*32, 0x20020038); - if (i == 0) - target_write_u32(target, 0x31000104, 0x20020038); - /* DMACCxLLI = next element */ - tmp = (target_mem_base+(1+i*2)*16)&0xfffffffc; - target_write_u32(target, target_mem_base+8+i*32, tmp); - if (i == 0) - target_write_u32(target, 0x31000108, tmp); - /* DMACCxControl = TransferSize =64, Source burst size =16, - * Destination burst size = 16, Source transfer width = 32 bit, - * Destination transfer width = 32 bit, Source AHB master select = M0, - * Destination AHB master select = M0, Source increment = 1, - * Destination increment = 0, Terminal count interrupt enable bit = 0*/ - target_write_u32(target, - target_mem_base+12+i*32, - 0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | - 0<<27 | 0<<31); - if (i == 0) - target_write_u32(target, - 0x3100010c, - 0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | - 0<<27 | 0<<31); - - /* -------LLI for 3 byte ECC--------- - * DMACC0SrcAddr = SLC_ECC*/ - target_write_u32(target, target_mem_base+16+i*32, 0x20020034); - /* DMACCxDestAddr = SRAM */ - target_write_u32(target, - target_mem_base+20+i*32, - target_mem_base+SPARE_OFFS+8+16*(i>>1)+(i%2)*4); - /* DMACCxLLI = next element */ - tmp = (target_mem_base+(2+i*2)*16)&0xfffffffc; - target_write_u32(target, target_mem_base+24+i*32, tmp); - /* DMACCxControl = TransferSize =1, Source burst size =4, - * Destination burst size = 4, Source transfer width = 32 bit, - * Destination transfer width = 32 bit, Source AHB master select = M0, - * Destination AHB master select = M0, Source increment = 0, - * Destination increment = 1, Terminal count interrupt enable bit = 0*/ - target_write_u32(target, - target_mem_base+28+i*32, - 0x01 | 1<<12 | 1<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<< - 31); - } - } else if (data && oob) { - /* -------LLI for 512 or 2048 bytes page--------- - * DMACC0SrcAddr = SRAM */ - target_write_u32(target, target_mem_base, target_mem_base+DATA_OFFS); - target_write_u32(target, 0x31000100, target_mem_base+DATA_OFFS); - /* DMACCxDestAddr = SLC_DMA_DATA */ - target_write_u32(target, target_mem_base+4, 0x20020038); - target_write_u32(target, 0x31000104, 0x20020038); - /* DMACCxLLI = next element */ - target_write_u32(target, - target_mem_base+8, - (target_mem_base+32)&0xfffffffc); - target_write_u32(target, 0x31000108, - (target_mem_base+32)&0xfffffffc); - /* DMACCxControl = TransferSize =512 or 128, Source burst size =16, - * Destination burst size = 16, Source transfer width = 32 bit, - * Destination transfer width = 32 bit, Source AHB master select = M0, - * Destination AHB master select = M0, Source increment = 1, - * Destination increment = 0, Terminal count interrupt enable bit = 0*/ - target_write_u32(target, - target_mem_base+12, - (nand->page_size == - 2048 ? 512 : 128) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | - 1<<26 | 0<<27 | 0<<31); - target_write_u32(target, - 0x3100010c, - (nand->page_size == - 2048 ? 512 : 128) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | - 1<<26 | 0<<27 | 0<<31); - i = 1; - } else if (!data && oob) - i = 0; - - /* -------LLI for spare area--------- - * DMACC0SrcAddr = SRAM*/ - target_write_u32(target, target_mem_base+0+i*32, target_mem_base+SPARE_OFFS); - if (i == 0) - target_write_u32(target, 0x31000100, target_mem_base+SPARE_OFFS); - /* DMACCxDestAddr = SLC_DMA_DATA */ - target_write_u32(target, target_mem_base+4+i*32, 0x20020038); - if (i == 0) - target_write_u32(target, 0x31000104, 0x20020038); - /* DMACCxLLI = next element = NULL */ - target_write_u32(target, target_mem_base+8+i*32, 0); - if (i == 0) - target_write_u32(target, 0x31000108, 0); - /* DMACCxControl = TransferSize =16 for large page or 4 for small page, - * Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit, - * Destination transfer width = 32 bit, Source AHB master select = M0, - * Destination AHB master select = M0, Source increment = 1, - * Destination increment = 0, Terminal count interrupt enable bit = 0*/ - target_write_u32(target, - target_mem_base+12+i*32, - (nand->page_size == - 2048 ? 0x10 : 0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | - 0<<27 | 0<<31); - if (i == 0) - target_write_u32(target, 0x3100010c, - (nand->page_size == 2048 ? - 0x10 : 0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | - 0<<25 | 1<<26 | 0<<27 | 0<<31); - - memset(ecc_flash_buffer, 0xff, 64); - if (oob) - memcpy(ecc_flash_buffer, oob, oob_size); - target_write_memory(target, - target_mem_base+SPARE_OFFS, - 4, - 16, - ecc_flash_buffer); - - if (data) { - memset(page_buffer, 0xff, nand->page_size == 2048 ? 2048 : 512); - memcpy(page_buffer, data, data_size); - target_write_memory(target, - target_mem_base+DATA_OFFS, - 4, - nand->page_size == 2048 ? 512 : 128, - page_buffer); - } - - free(page_buffer); - free(ecc_flash_buffer); - - /* Enable DMA after channel set up ! - LLI only works when DMA is the flow controller! - */ - /* DMACCxConfig= E=1, SrcPeripheral = 1 (SLC), DestPeripheral = 1 (SLC), - *FlowCntrl = 2 (Pher -> Mem, DMA), IE = 0, ITC = 0, L= 0, H=0*/ - target_write_u32(target, - 0x31000110, - 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18); - - /* SLC_CTRL = 3 (START DMA), ECC_CLEAR */ - target_write_u32(target, 0x20020010, 0x3); - - /* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/ - target_write_u32(target, 0x20020028, 2); - - /* SLC_TC */ - if (!data && oob) - target_write_u32(target, 0x20020030, - (nand->page_size == 2048 ? 0x10 : 0x04)); - else - target_write_u32(target, 0x20020030, - (nand->page_size == 2048 ? 0x840 : 0x210)); - - nand_write_finish(nand); - - if (!lpc3180_tc_ready(nand, 1000)) { - LOG_ERROR("timeout while waiting for completion of DMA"); - return ERROR_NAND_OPERATION_FAILED; - } - - target_free_working_area(target, pworking_area); - - LOG_INFO("Page = 0x%" PRIx32 " was written.", page); - - } else - return nand_write_page_raw(nand, page, data, data_size, oob, oob_size); - } - - return ERROR_OK; -} - -static int lpc3180_read_page(struct nand_device *nand, - uint32_t page, - uint8_t *data, - uint32_t data_size, - uint8_t *oob, - uint32_t oob_size) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - uint8_t *page_buffer; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); - return ERROR_NAND_OPERATION_FAILED; - } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - uint8_t *oob_buffer; - uint32_t page_bytes_done = 0; - uint32_t oob_bytes_done = 0; - uint32_t mlc_isr; - -#if 0 - if (oob && (oob_size > 6)) { - LOG_ERROR("LPC3180 MLC controller can't read more than 6 bytes of OOB data"); - return ERROR_NAND_OPERATION_NOT_SUPPORTED; - } -#endif - - if (data_size > (uint32_t)nand->page_size) { - LOG_ERROR("data size exceeds page size"); - return ERROR_NAND_OPERATION_NOT_SUPPORTED; - } - - if (nand->page_size == 2048) { - page_buffer = malloc(2048); - oob_buffer = malloc(64); - } else { - page_buffer = malloc(512); - oob_buffer = malloc(16); - } - - if (!data && oob) { - /* MLC_CMD = Read OOB - * we can use the READOOB command on both small and large page devices, - * as the controller translates the 0x50 command to a 0x0 with appropriate - * positioning of the serial buffer read pointer - */ - target_write_u32(target, 0x200b8000, NAND_CMD_READOOB); - } else { - /* MLC_CMD = Read0 */ - target_write_u32(target, 0x200b8000, NAND_CMD_READ0); - } - - if (nand->page_size == 512) { - /* small page device - * MLC_ADDR = 0x0 (one column cycle) */ - target_write_u32(target, 0x200b8004, 0x0); - - /* MLC_ADDR = row */ - target_write_u32(target, 0x200b8004, page & 0xff); - target_write_u32(target, 0x200b8004, (page >> 8) & 0xff); - - if (nand->address_cycles == 4) - target_write_u32(target, 0x200b8004, (page >> 16) & 0xff); - } else { - /* large page device - * MLC_ADDR = 0x0 (two column cycles) */ - target_write_u32(target, 0x200b8004, 0x0); - target_write_u32(target, 0x200b8004, 0x0); - - /* MLC_ADDR = row */ - target_write_u32(target, 0x200b8004, page & 0xff); - target_write_u32(target, 0x200b8004, (page >> 8) & 0xff); - - /* MLC_CMD = Read Start */ - target_write_u32(target, 0x200b8000, NAND_CMD_READSTART); - } - - while (page_bytes_done < (uint32_t)nand->page_size) { - /* MLC_ECC_AUTO_DEC_REG = dummy */ - target_write_u32(target, 0x200b8014, 0xaa55aa55); - - if (!lpc3180_controller_ready(nand, 1000)) { - LOG_ERROR("timeout while waiting for completion of auto decode cycle"); - free(page_buffer); - free(oob_buffer); - return ERROR_NAND_OPERATION_FAILED; - } - - target_read_u32(target, 0x200b8048, &mlc_isr); - - if (mlc_isr & 0x8) { - if (mlc_isr & 0x40) { - LOG_ERROR("uncorrectable error detected: 0x%2.2x", - (unsigned)mlc_isr); - free(page_buffer); - free(oob_buffer); - return ERROR_NAND_OPERATION_FAILED; - } - - LOG_WARNING("%i symbol error detected and corrected", - ((int)(((mlc_isr & 0x30) >> 4) + 1))); - } - - if (data) - target_read_memory(target, - 0x200a8000, - 4, - 128, - page_buffer + page_bytes_done); - - if (oob) - target_read_memory(target, - 0x200a8000, - 4, - 4, - oob_buffer + oob_bytes_done); - - page_bytes_done += 512; - oob_bytes_done += 16; - } - - if (data) - memcpy(data, page_buffer, data_size); - - if (oob) - memcpy(oob, oob_buffer, oob_size); - - free(page_buffer); - free(oob_buffer); - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - - /********************************************************************** - * Read both SLC NAND flash page main area and spare area. - * Small page - - * ------------------------------------------ - * | 512 bytes main | 16 bytes spare | - * ------------------------------------------ - * Large page - - * ------------------------------------------ - * | 2048 bytes main | 64 bytes spare | - * ------------------------------------------ - * If DMA & ECC enabled, then the ECC generated for the 1st 256-byte - * data is compared with the 3rd word of the spare area. The ECC - * generated for the 2nd 256-byte data is compared with the 4th word - * of the spare area. The ECC generated for the 3rd 256-byte data is - * compared with the 7th word of the spare area. The ECC generated - * for the 4th 256-byte data is compared with the 8th word of the - * spare area and so on. - * - **********************************************************************/ - - int retval, i, target_mem_base; - uint8_t *ecc_hw_buffer; - uint8_t *ecc_flash_buffer; - struct working_area *pworking_area; - - if (lpc3180_info->is_bulk) { - - /* read always the data and also oob areas*/ - - retval = nand_page_command(nand, page, NAND_CMD_READ0, 0); - if (ERROR_OK != retval) - return retval; - - /* allocate a working area */ - if (target->working_area_size < (uint32_t) nand->page_size + 0x200) { - LOG_ERROR("Reserve at least 0x%x physical target working area", - nand->page_size + 0x200); - return ERROR_FLASH_OPERATION_FAILED; - } - if (target->working_area_phys%4) { - LOG_ERROR( - "Reserve the physical target working area at word boundary"); - return ERROR_FLASH_OPERATION_FAILED; - } - if (target_alloc_working_area(target, target->working_area_size, - &pworking_area) != ERROR_OK) { - LOG_ERROR("no working area specified, can't read LPC internal flash"); - return ERROR_FLASH_OPERATION_FAILED; - } - target_mem_base = target->working_area_phys; - - if (nand->page_size == 2048) - page_buffer = malloc(2048); - else - page_buffer = malloc(512); - - ecc_hw_buffer = malloc(32); - ecc_flash_buffer = malloc(64); - - /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst - *enabled, DMA read from SLC, WIDTH = bus_width) */ - target_write_u32(target, 0x20020014, 0x3e); - - /* set DMA LLI-s in target memory and in DMA*/ - for (i = 0; i < nand->page_size/0x100; i++) { - int tmp; - /* -------LLI for 256 byte block--------- - * DMACC0SrcAddr = SLC_DMA_DATA*/ - target_write_u32(target, target_mem_base+0+i*32, 0x20020038); - if (i == 0) - target_write_u32(target, 0x31000100, 0x20020038); - /* DMACCxDestAddr = SRAM */ - target_write_u32(target, - target_mem_base+4+i*32, - target_mem_base+DATA_OFFS+i*256); - if (i == 0) - target_write_u32(target, - 0x31000104, - target_mem_base+DATA_OFFS); - /* DMACCxLLI = next element */ - tmp = (target_mem_base+(1+i*2)*16)&0xfffffffc; - target_write_u32(target, target_mem_base+8+i*32, tmp); - if (i == 0) - target_write_u32(target, 0x31000108, tmp); - /* DMACCxControl = TransferSize =64, Source burst size =16, - * Destination burst size = 16, Source transfer width = 32 bit, - * Destination transfer width = 32 bit, Source AHB master select = M0, - * Destination AHB master select = M0, Source increment = 0, - * Destination increment = 1, Terminal count interrupt enable bit = 0*/ - target_write_u32(target, - target_mem_base+12+i*32, - 0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<< - 31); - if (i == 0) - target_write_u32(target, - 0x3100010c, - 0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<< - 31); - - /* -------LLI for 3 byte ECC--------- - * DMACC0SrcAddr = SLC_ECC*/ - target_write_u32(target, target_mem_base+16+i*32, 0x20020034); - /* DMACCxDestAddr = SRAM */ - target_write_u32(target, - target_mem_base+20+i*32, - target_mem_base+ECC_OFFS+i*4); - /* DMACCxLLI = next element */ - tmp = (target_mem_base+(2+i*2)*16)&0xfffffffc; - target_write_u32(target, target_mem_base+24+i*32, tmp); - /* DMACCxControl = TransferSize =1, Source burst size =4, - * Destination burst size = 4, Source transfer width = 32 bit, - * Destination transfer width = 32 bit, Source AHB master select = M0, - * Destination AHB master select = M0, Source increment = 0, - * Destination increment = 1, Terminal count interrupt enable bit = 0*/ - target_write_u32(target, - target_mem_base+28+i*32, - 0x01 | 1<<12 | 1<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<< - 31); - } - - /* -------LLI for spare area--------- - * DMACC0SrcAddr = SLC_DMA_DATA*/ - target_write_u32(target, target_mem_base+0+i*32, 0x20020038); - /* DMACCxDestAddr = SRAM */ - target_write_u32(target, target_mem_base+4+i*32, target_mem_base+SPARE_OFFS); - /* DMACCxLLI = next element = NULL */ - target_write_u32(target, target_mem_base+8+i*32, 0); - /* DMACCxControl = TransferSize =16 for large page or 4 for small page, - * Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit, - * Destination transfer width = 32 bit, Source AHB master select = M0, - * Destination AHB master select = M0, Source increment = 0, - * Destination increment = 1, Terminal count interrupt enable bit = 0*/ - target_write_u32(target, - target_mem_base + 12 + i * 32, - (nand->page_size == 2048 ? 0x10 : 0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | - 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<<31); - - /* Enable DMA after channel set up ! - LLI only works when DMA is the flow controller! - */ - /* DMACCxConfig= E=1, SrcPeripheral = 1 (SLC), DestPeripheral = 1 (SLC), - *FlowCntrl = 2 (Pher-> Mem, DMA), IE = 0, ITC = 0, L= 0, H=0*/ - target_write_u32(target, - 0x31000110, - 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18); - - /* SLC_CTRL = 3 (START DMA), ECC_CLEAR */ - target_write_u32(target, 0x20020010, 0x3); - - /* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/ - target_write_u32(target, 0x20020028, 2); - - /* SLC_TC */ - target_write_u32(target, 0x20020030, - (nand->page_size == 2048 ? 0x840 : 0x210)); - - if (!lpc3180_tc_ready(nand, 1000)) { - LOG_ERROR("timeout while waiting for completion of DMA"); - free(page_buffer); - free(ecc_hw_buffer); - free(ecc_flash_buffer); - target_free_working_area(target, pworking_area); - return ERROR_NAND_OPERATION_FAILED; - } - - if (data) { - target_read_memory(target, - target_mem_base+DATA_OFFS, - 4, - nand->page_size == 2048 ? 512 : 128, - page_buffer); - memcpy(data, page_buffer, data_size); - - LOG_INFO("Page = 0x%" PRIx32 " was read.", page); - - /* check hw generated ECC for each 256 bytes block with the saved - *ECC in flash spare area*/ - int idx = nand->page_size/0x200; - target_read_memory(target, - target_mem_base+SPARE_OFFS, - 4, - 16, - ecc_flash_buffer); - target_read_memory(target, - target_mem_base+ECC_OFFS, - 4, - 8, - ecc_hw_buffer); - for (i = 0; i < idx; i++) { - if ((0x00ffffff & *(uint32_t *)(void *)(ecc_hw_buffer+i*8)) != - (0x00ffffff & *(uint32_t *)(void *)(ecc_flash_buffer+8+i*16))) - LOG_WARNING( - "ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32, - i * 2 + 1, page); - if ((0x00ffffff & *(uint32_t *)(void *)(ecc_hw_buffer+4+i*8)) != - (0x00ffffff & *(uint32_t *)(void *)(ecc_flash_buffer+12+i*16))) - LOG_WARNING( - "ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32, - i * 2 + 2, page); - } - } - - if (oob) - memcpy(oob, ecc_flash_buffer, oob_size); - - free(page_buffer); - free(ecc_hw_buffer); - free(ecc_flash_buffer); - - target_free_working_area(target, pworking_area); - - } else - return nand_read_page_raw(nand, page, data, data_size, oob, oob_size); - } - - return ERROR_OK; -} - -static int lpc3180_controller_ready(struct nand_device *nand, int timeout) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - LOG_DEBUG("lpc3180_controller_ready count start=%d", timeout); - - do { - if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - uint8_t status; - - /* Read MLC_ISR, wait for controller to become ready */ - target_read_u8(target, 0x200b8048, &status); - - if (status & 2) { - LOG_DEBUG("lpc3180_controller_ready count=%d", - timeout); - return 1; - } - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - uint32_t status; - - /* Read SLC_STAT and check READY bit */ - target_read_u32(target, 0x20020018, &status); - - if (status & 1) { - LOG_DEBUG("lpc3180_controller_ready count=%d", - timeout); - return 1; - } - } - - alive_sleep(1); - } while (timeout-- > 0); - - return 0; -} - -static int lpc3180_nand_ready(struct nand_device *nand, int timeout) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - LOG_DEBUG("lpc3180_nand_ready count start=%d", timeout); - - do { - if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) { - uint8_t status = 0x0; - - /* Read MLC_ISR, wait for NAND flash device to become ready */ - target_read_u8(target, 0x200b8048, &status); - - if (status & 1) { - LOG_DEBUG("lpc3180_nand_ready count end=%d", - timeout); - return 1; - } - } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - uint32_t status = 0x0; - - /* Read SLC_STAT and check READY bit */ - target_read_u32(target, 0x20020018, &status); - - if (status & 1) { - LOG_DEBUG("lpc3180_nand_ready count end=%d", - timeout); - return 1; - } - } - - alive_sleep(1); - } while (timeout-- > 0); - - return 0; -} - -static int lpc3180_tc_ready(struct nand_device *nand, int timeout) -{ - struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv; - struct target *target = nand->target; - - if (target->state != TARGET_HALTED) { - LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); - return ERROR_NAND_OPERATION_FAILED; - } - - LOG_DEBUG("lpc3180_tc_ready count start=%d", - timeout); - - do { - if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) { - uint32_t status = 0x0; - /* Read SLC_INT_STAT and check INT_TC_STAT bit */ - target_read_u32(target, 0x2002001c, &status); - - if (status & 2) { - LOG_DEBUG("lpc3180_tc_ready count=%d", - timeout); - return 1; - } - } - - alive_sleep(1); - } while (timeout-- > 0); - - return 0; -} - -COMMAND_HANDLER(handle_lpc3180_select_command) -{ - struct lpc3180_nand_controller *lpc3180_info = NULL; - char *selected[] = { - "no", "mlc", "slc" - }; - - if ((CMD_ARGC < 1) || (CMD_ARGC > 3)) - return ERROR_COMMAND_SYNTAX_ERROR; - - unsigned num; - COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num); - struct nand_device *nand = get_nand_device_by_num(num); - if (!nand) { - command_print(CMD_CTX, "nand device '#%s' is out of bounds", CMD_ARGV[0]); - return ERROR_OK; - } - - lpc3180_info = nand->controller_priv; - - if (CMD_ARGC >= 2) { - if (strcmp(CMD_ARGV[1], "mlc") == 0) - lpc3180_info->selected_controller = LPC3180_MLC_CONTROLLER; - else if (strcmp(CMD_ARGV[1], "slc") == 0) { - lpc3180_info->selected_controller = LPC3180_SLC_CONTROLLER; - if (CMD_ARGC == 3 && strcmp(CMD_ARGV[2], "bulk") == 0) - lpc3180_info->is_bulk = 1; - else - lpc3180_info->is_bulk = 0; - } else - return ERROR_COMMAND_SYNTAX_ERROR; - } - - if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) - command_print(CMD_CTX, "%s controller selected", - selected[lpc3180_info->selected_controller]); - else - command_print(CMD_CTX, - lpc3180_info->is_bulk ? "%s controller selected bulk mode is available" : - "%s controller selected bulk mode is not available", - selected[lpc3180_info->selected_controller]); - - return ERROR_OK; -} - -static const struct command_registration lpc3180_exec_command_handlers[] = { - { - .name = "select", - .handler = handle_lpc3180_select_command, - .mode = COMMAND_EXEC, - .help = - "select MLC or SLC controller (default is MLC), SLC can be set to bulk mode", - .usage = "bank_id ['mlc'|'slc' ['bulk'] ]", - }, - COMMAND_REGISTRATION_DONE -}; -static const struct command_registration lpc3180_command_handler[] = { - { - .name = "lpc3180", - .mode = COMMAND_ANY, - .help = "LPC3180 NAND flash controller commands", - .usage = "", - .chain = lpc3180_exec_command_handlers, - }, - COMMAND_REGISTRATION_DONE -}; - -struct nand_flash_controller lpc3180_nand_controller = { - .name = "lpc3180", - .commands = lpc3180_command_handler, - .nand_device_command = lpc3180_nand_device_command, - .init = lpc3180_init, - .reset = lpc3180_reset, - .command = lpc3180_command, - .address = lpc3180_address, - .write_data = lpc3180_write_data, - .read_data = lpc3180_read_data, - .write_page = lpc3180_write_page, - .read_page = lpc3180_read_page, - .nand_ready = lpc3180_nand_ready, -}; http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.h ---------------------------------------------------------------------- diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.h deleted file mode 100755 index 4d162fc..0000000 --- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.h +++ /dev/null @@ -1,39 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2007 by Dominic Rath * - * dominic.r...@gmx.de * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - -#ifndef LPC3180_NAND_CONTROLLER_H -#define LPC3180_NAND_CONTROLLER_H - -enum lpc3180_selected_controller { - LPC3180_NO_CONTROLLER, - LPC3180_MLC_CONTROLLER, - LPC3180_SLC_CONTROLLER, -}; - -struct lpc3180_nand_controller { - int osc_freq; - enum lpc3180_selected_controller selected_controller; - int is_bulk; - int sw_write_protection; - uint32_t sw_wp_lower_bound; - uint32_t sw_wp_upper_bound; -}; - -#endif /*LPC3180_NAND_CONTROLLER_H */
