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commit 7e92cb22146b8491e51eb624064a3971928bedfc Author: Phong Nguyen <p...@nxp.io> AuthorDate: Fri Mar 22 08:42:19 2024 -0700 Work around a GCC bug for __sync_val_compare_and_swap on ARMv8.1+ (#11147) (cherry picked from commit 60d038cd8038b3bc33e4765c44c17e8df3e7b0e6) --- include/tscore/ink_queue.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/include/tscore/ink_queue.h b/include/tscore/ink_queue.h index 3b4b9ce204..dace11e091 100644 --- a/include/tscore/ink_queue.h +++ b/include/tscore/ink_queue.h @@ -57,10 +57,12 @@ void ink_queue_load_64(void *dst, void *src); #define INK_QUEUE_LD64(dst, src) (ink_queue_load_64((void *)&(dst), (void *)&(src))) #endif +// passing a const volatile value of 0 works around a gcc bug #if TS_HAS_128BIT_CAS -#define INK_QUEUE_LD(dst, src) \ - do { \ - *(__int128_t *)&(dst) = __sync_val_compare_and_swap((__int128_t *)&(src), 0, 0); \ +#define INK_QUEUE_LD(dst, src) \ + do { \ + const volatile __int128_t iqld0 = 0; \ + *(__int128_t *)&(dst) = __sync_val_compare_and_swap((__int128_t *)&(src), 0, iqld0); \ } while (0) #else #define INK_QUEUE_LD(dst, src) INK_QUEUE_LD64(dst, src)