On Tue, 4 Jan 2022 02:25:36 GMT, Vladimir Kozlov wrote:
> I think whole "Bitwise operation packing optimization" code should be moved
> out from `compile.cpp`. May be to `vectornode.cpp where `MacroLogicVNode`
> code is located.
>
Hi @vnkozlov ,
Yes we can also extended AndV/OrV/XorV/AndVMask/
On Tue, 4 Jan 2022 15:01:22 GMT, Jatin Bhateja wrote:
>> src/hotspot/cpu/x86/x86.ad line 1900:
>>
>>> 1898:
>>> 1899: case Op_MacroLogicV:
>>> 1900: if(bt != T_INT && bt != T_LONG) {
>>
>> Missing `VM_Version::supports_evex()` check?
>
> Hi @vnkozlov, we already have that check (UseA
On Tue, 4 Jan 2022 02:21:35 GMT, Vladimir Kozlov wrote:
>> Jatin Bhateja has updated the pull request with a new target base due to a
>> merge or a rebase. The incremental webrev excludes the unrelated changes
>> brought in by the merge/rebase. The pull request contains two additional
>> commi
On Mon, 3 Jan 2022 12:31:50 GMT, Jatin Bhateja wrote:
>> Patch extends existing macrologic inferencing algorithm to handle masked
>> logic operations.
>>
>> Existing algorithm:
>>
>> 1. Identify logic cone roots.
>> 2. Packs parent and logic child nodes into a MacroLogic node in bottom up
>>
> Patch extends existing macrologic inferencing algorithm to handle masked
> logic operations.
>
> Existing algorithm:
>
> 1. Identify logic cone roots.
> 2. Packs parent and logic child nodes into a MacroLogic node in bottom up
> traversal if input constraint are met.
> i.e. maximum number of
