On Thu, 12 Oct 2023 03:44:28 GMT, Danny Thomas wrote:
> At least on Saphire Rapids the [emulation suggested
> here](https://github.com/natmaurice/x86-simd-sort/commit/41d03b2d8f3b62a2ee6a3a97a8da7f193a407026)
> only imposes a 6% penalty for `intSort`, while also mitigating the
> performance
On Wed, 11 Oct 2023 20:58:23 GMT, Srinivas Vamsi Parasa
wrote:
>> The goal of this PR is to address the follow-up comments to the SIMD
>> accelerated sort PR (#14227) which implemented AVX512 intrinsics for
>> Arrays.sort() methods.
>> The proposed changes are:
>>
>> 1) Restriction of the
On Thu, 12 Oct 2023 04:41:37 GMT, Vladimir Kozlov wrote:
> My tier1-3,xcomp testing for v04 passed. I am integrating these changes. Lets
> continue discussion about changes for AMD in
> https://bugs.openjdk.org/browse/JDK-8317976.
Thank you, Vladimir!
-
PR Comment:
On Wed, 11 Oct 2023 20:58:23 GMT, Srinivas Vamsi Parasa
wrote:
>> The goal of this PR is to address the follow-up comments to the SIMD
>> accelerated sort PR (#14227) which implemented AVX512 intrinsics for
>> Arrays.sort() methods.
>> The proposed changes are:
>>
>> 1) Restriction of the
On Wed, 11 Oct 2023 20:58:23 GMT, Srinivas Vamsi Parasa
wrote:
>> The goal of this PR is to address the follow-up comments to the SIMD
>> accelerated sort PR (#14227) which implemented AVX512 intrinsics for
>> Arrays.sort() methods.
>> The proposed changes are:
>>
>> 1) Restriction of the
On Wed, 11 Oct 2023 23:40:55 GMT, Sandhya Viswanathan
wrote:
> > It makes sense to let `-XX:ControlIntrinsic=` overrule
> > `VM_Version::is_intel()` check and enable the intrinsics when `AVX512DQ` is
> > supported.
>
> May be it could be done as part of
>
On Wed, 11 Oct 2023 23:14:26 GMT, Vladimir Ivanov wrote:
> Proposed patch has one disadvantage: there's no way to override ergonomics
> decisions on AMD CPUs and forcibly enable the intrinsic without rebuilding
> the JVM.
>
> For many other intrinsics there are flags which enable finer
On Wed, 11 Oct 2023 20:58:23 GMT, Srinivas Vamsi Parasa
wrote:
>> The goal of this PR is to address the follow-up comments to the SIMD
>> accelerated sort PR (#14227) which implemented AVX512 intrinsics for
>> Arrays.sort() methods.
>> The proposed changes are:
>>
>> 1) Restriction of the
On Wed, 11 Oct 2023 20:58:23 GMT, Srinivas Vamsi Parasa
wrote:
>> The goal of this PR is to address the follow-up comments to the SIMD
>> accelerated sort PR (#14227) which implemented AVX512 intrinsics for
>> Arrays.sort() methods.
>> The proposed changes are:
>>
>> 1) Restriction of the
> The goal of this PR is to address the follow-up comments to the SIMD
> accelerated sort PR (#14227) which implemented AVX512 intrinsics for
> Arrays.sort() methods.
> The proposed changes are:
>
> 1) Restriction of the AVX512 sort acceleration to only Intel CPUs. A
> performance regression
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