The v3 version was heavily adapted and it does work nice in cross
compile environments already.
Are you sure there is a benefit of updating it?
The benefit of frequently updating to new versions of foreign code
is that when you don't, you will have a really hard time updating
later when you _do_
On 06.08.2008 18:54, Marc Jones wrote:
> Carl-Daniel Hailfinger wrote:
>
>> - "Errata 193: Disable clean copybacks to L3 cache to allow cached ROM."
>> Erratum 193 seems to be unlisted in public data sheets. If it is the
>> famous L3 problem, we might want to enable the workaround only on
>> affect
On Thu, 7 Aug 2008 19:09:02 -0400, Kevin O'Connor <[EMAIL PROTECTED]>
wrote:
> On Thu, Aug 07, 2008 at 02:52:11PM -0400, Joseph Smith wrote:
>> Maybe I missed something
>> Normally option roms are supposed to get copied to memory just below the
> 4G
>> boundry (bios size - 4G) and then exicu
Author: ward
Date: 2008-08-08 02:12:27 +0200 (Fri, 08 Aug 2008)
New Revision: 216
Modified:
buildrom-devel/config/platforms/qemu.conf
Log:
Bump up coreboot-v2 revision for qemu to take advantage of the enabling of the
ide devices that just went into the tree.
This is a trivial patch.
Signed-
Author: ward
Date: 2008-08-08 02:08:01 +0200 (Fri, 08 Aug 2008)
New Revision: 3481
Modified:
trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Config.lb
Log:
Enable both IDE ports for our qemu target.
Signed-off-by: Ward Vandewege <[EMAIL PROTECTED]>
Acked-by: Ronald G. Minnich <[EMAIL PROTE
Acked-by; Ronald G. Minnich <[EMAIL PROTECTED]>
--
coreboot mailing list
coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
The subject says it all. With this patch, the ata_piix driver will actually
see the IDE devices, imagine that.
Tested on qemu, with kernel 2.6.26.2.
Thanks,
Ward.
--
Ward Vandewege <[EMAIL PROTECTED]>
Free Software Foundation - Senior Systems Administrator
Enable both IDE ports for our qemu ta
On Thu, Aug 07, 2008 at 02:52:11PM -0400, Joseph Smith wrote:
> Maybe I missed something
> Normally option roms are supposed to get copied to memory just below the 4G
> boundry (bios size - 4G) and then exicuted from there. Why not just have
> seabios copy it to memory and exicute it there??
O
Hi Zhang,
On Fri, Aug 08, 2008 at 12:11:23AM +0800, Zhang Rui wrote:
> 2008/8/6, Kevin O'Connor <[EMAIL PROTECTED]>:
> > On Tue, Aug 05, 2008 at 12:44:55PM +0800, Zhang Rui wrote:
> > > so if I want to write the int13 for scsi booting, should I write
> > > interrupt function in coreboot and inject
Author: mjones
Date: 2008-08-08 00:00:51 +0200 (Fri, 08 Aug 2008)
New Revision: 3480
Modified:
trunk/coreboot-v2/src/cpu/amd/model_fxx/fidvid.c
Log:
Clean up whitespace and comments style. (trivial)
Signed-off-by: Marc Jones <[EMAIL PROTECTED]>
Acked-by: Marc Jones <[EMAIL PROTECTED]>
Modifi
Author: stepan
Date: 2008-08-07 21:09:17 +0200 (Thu, 07 Aug 2008)
New Revision: 3479
Modified:
trunk/payloads/coreinfo/pci_module.c
trunk/payloads/libpayload/drivers/pci.c
trunk/payloads/libpayload/include/pci.h
Log:
Add a full set of pci access functions.
Signed-off-by: Stefan Reinauer
On Fri, 8 Aug 2008 00:11:23 +0800, "Zhang Rui" <[EMAIL PROTECTED]> wrote:
> Hello,
>
> 2008/8/6, Kevin O'Connor <[EMAIL PROTECTED]>:
>> On Tue, Aug 05, 2008 at 12:44:55PM +0800, Zhang Rui wrote:
>> > so if I want to write the int13 for scsi booting, should I write
>> > interrupt function in cor
On Thu, Aug 07, 2008 at 09:16:02AM -0700, abhijit sarma wrote:
> The chipsets, northbridge, southbridge, superio, cpu etc seems to
> be supported.
..
> The main board is ASUS P5P800-VM
> Socket 775, Intel 865G + Intel ICH5
..
> 00:00.0 Host bridge: Intel Corporation 82865G/PE/P DRAM Controller/Hos
Hi All,
I want to run coreboot in my PC but the motherboard is not supported. The
chipsets, northbridge, southbridge, superio, cpu etc seems to be supported. How
can I create a new target. I can modify the code if I know the relevent details.
The main board is ASUS P5P800-VM
Socket 775, Intel 86
Uwe Hermann wrote:
> See patch.
>
> This also changes libpayload to put all *.o files into build/ as our
> other stuff also does (i.e. not have *.o files in the src dir).
>
>
> On a related note, here's a quick overview of all our kconfig copies:
>
> - coreinfo:RECENT (03/2008)
> - buildrom:
Hello,
2008/8/6, Kevin O'Connor <[EMAIL PROTECTED]>:
> On Tue, Aug 05, 2008 at 12:44:55PM +0800, Zhang Rui wrote:
> > so if I want to write the int13 for scsi booting, should I write
> > interrupt function in coreboot and inject it to int13, or just write
> > codes in seabios?
>
> I'm not sure wha
Nice progress!
On Thu, Aug 07, 2008 at 04:02:29PM +0200, Arne Georg Gleditsch wrote:
> Now, if I could just get FILO to find my disks...
Please enable DEBUG_PCI and DEBUG_IDE, and rebuild FILO.
Optionally also apply my pio4+debug6 patch for better IDE debugging:
http://stuge.se/filo.r49.ide_ext
Hello,
2008/8/6, Kevin O'Connor <[EMAIL PROTECTED]>:
> On Tue, Aug 05, 2008 at 12:50:54PM +0800, Zhang Rui wrote:
> No. The call_int16(0x19, ...) function will call irq_trampoline_0x19
> in real mode (see src/util.h). The irq_trampoline_0x19 code is
> defined in src/romlayout.S (see macro "IRQ
Jordan Crouse wrote:
> On 07/08/08 17:20 +0200, Stefan Reinauer wrote:
>
>> Jordan Crouse wrote:
>>
>>
Index: libpayload/bin/lpgcc
===
--- libpayload/bin/lpgcc (revision 3473)
+++ libpayload/bin/lpgcc (w
Author: stepan
Date: 2008-08-07 17:28:31 +0200 (Thu, 07 Aug 2008)
New Revision: 3478
Modified:
trunk/payloads/libpayload/Makefile
Log:
fix stack protection detection with Jordan's suggestion
Signed-off-by: Stefan Reinauer <[EMAIL PROTECTED]>
Acked-by: Stefan Reinauer <[EMAIL PROTECTED]>
Mod
On 07/08/08 17:20 +0200, Stefan Reinauer wrote:
> Jordan Crouse wrote:
>
> >> Index: libpayload/bin/lpgcc
> >> ===
> >> --- libpayload/bin/lpgcc (revision 3473)
> >> +++ libpayload/bin/lpgcc (working copy)
> >> @@ -28,8 +28,7 @@
>
Author: stepan
Date: 2008-08-07 17:22:01 +0200 (Thu, 07 Aug 2008)
New Revision: 3477
Modified:
trunk/payloads/coreinfo/Makefile
trunk/payloads/libpayload/bin/lpgcc
Log:
fix cross compilationor libpayload / coreinfo by honoring
the setting of CC in the payload (coreinfo) when calling
make C
Jordan Crouse wrote:
>> Index: libpayload/bin/lpgcc
>> ===
>> --- libpayload/bin/lpgcc (revision 3473)
>> +++ libpayload/bin/lpgcc (working copy)
>> @@ -28,8 +28,7 @@
>>
>> # GCC wrapper for libpayload
>>
>> -DEFAULT_PREF
On 07/08/08 13:16 +0200, Stefan Reinauer wrote:
> See patch
>
> --
> coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
> Tel.: +49 761 7668825 • Fax: +49 761 7664613
> Email: [EMAIL PROTECTED] • http://www.coresystems.de/
> Registergericht: Amtsgericht Freiburg • HRB 7656
> Geschä
Author: uwe
Date: 2008-08-07 16:35:39 +0200 (Thu, 07 Aug 2008)
New Revision: 3476
Modified:
trunk/payloads/coreinfo/coreinfo.c
trunk/payloads/coreinfo/lar_module.c
Log:
Cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>
Acked-by: Uwe Hermann <[EMAIL PROTECTED]>
Modi
Marc Jones <[EMAIL PROTECTED]> writes:
> I think that is a good way to go.
That seems to have worked reasonably well. I can now get to
[..]
PCI: 01:04.0 init
rom address for PCI: 01:04.0 = fc00
Incorrect Expansion ROM Header Signature 7070
Devices initialized
i=0 bus range: [0, 4] bus_isa=5
Peter Stuge wrote:
> On Thu, Aug 07, 2008 at 01:16:03PM +0200, Stefan Reinauer wrote:
>
>> +++ libpayload/util/kconfig/lxdialog/check-lxdialog.sh (working copy)
>> @@ -19,6 +19,11 @@
>> echo '-lcurses'
>> exit
>> fi
>> +$cc -print-file-name=libcurses.dyli
On Thu, Aug 07, 2008 at 01:16:03PM +0200, Stefan Reinauer wrote:
> +++ libpayload/util/kconfig/lxdialog/check-lxdialog.sh(working copy)
> @@ -19,6 +19,11 @@
> echo '-lcurses'
> exit
> fi
> + $cc -print-file-name=libcurses.dylib | grep -q /
Really lower
See patch
--
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: [EMAIL PROTECTED] • http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
Attempt to
Author: stepan
Date: 2008-08-07 12:32:54 +0200 (Thu, 07 Aug 2008)
New Revision: 3475
Modified:
trunk/payloads/coreinfo/util/kconfig/Makefile
Log:
fix make menuconfig if no libintl.h is found. (trivial)
Signed-off-by: Stefan Reinauer <[EMAIL PROTECTED]>
Acked-by: Stefan Reinauer <[EMAIL PROTECT
Author: stepan
Date: 2008-08-07 12:21:05 +0200 (Thu, 07 Aug 2008)
New Revision: 3474
Added:
trunk/payloads/libpayload/drivers/options.c
Modified:
trunk/payloads/libpayload/drivers/Makefile.inc
trunk/payloads/libpayload/i386/coreboot.c
trunk/payloads/libpayload/include/coreboot_tables.h
Hello,
Unfortunatelly it seems that r210 (the kconfig version bump) introduced
a serious breakage in buildrom.
This is a build log where you can see the failure:
http://pastebin.com/f72bc591f
Steps to reproduce:
get current buildrom from svn (any revision >r210 will do)
make menuconfig, select
32 matches
Mail list logo
