Hi,
the patch below allows for interrupt driven parport usage (even when
CONFIG_PARPORT_PC_SUPERIO is not set in the kernel config). It has
been prepared with Rudolf's help on IRC. Please test and/or improve!
According to Rudolf, it would be better better to code something in
ACPI code which will
Hi,
One thing I would like to ask, not just regarding this motherboard but
all AM2/AM2+/AM3 boards.
Would it be possible to implement a feature that would allow us to
configure custom P-States to save on CMOS, other than what the
manufacturer specifies? Most BIOS allow setting lower and higher
mul
> In SB600, the IOAPIC is allocated in sb600_sm.c. Is there any conflict
> with sb600_lpc.c?
It was just for backward compatibility. I put a fixed allocation at
0xfec0 in most boards because that's where it used to be. If there's
nothing that needs to be protected there, you can remove it.
On Fri, Jul 03, 2009 at 03:53:58PM +0800, jasonz...@viatech.com.cn wrote:
> I work out some code to make seabios run vgabios when resuming from S3
> (follow your advice on IRC, again :) ). And it is unbelievable easy,
> only 2 step:
Great!
> Setp 1: In acpi.c
[...]
> + //these two lines has s
Bao, Zheng wrote:
> This patch makes my AMD fam10 board not work (K8 works). The
> resource can not be allocated correctly.
Thanks for the report!
Could you send debug output from the Fam10 system?
//Peter
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinf
#134: flashrom crashes systems with WPC876x/WPCE775x embedded controller on LPC
bus ()
+---
Reporter: Timo Juhani Lindfors| Owner:
somebody
Type: defect
On Sat, Jun 20, 2009 at 03:00:22PM +0200, Peter Stuge wrote:
> Sebastian Schuberth wrote:
> > I don't know if it's even technically possible to distinguish the
> > CN and EN series, or if they are simply too close / almost
> > identical from a chipset etc. view,
>
> Yep, they are.
>
>
> > but I'
Peter Stuge escribió:
Cristi Magherusan wrote:
I think this could be a good testcase for SerialICE
What do you think?
I think it's difficult to use SerialICE without a serial port. :\
Well... instead of keep trying to find a way to mentally use a serial
port, ive decided this weekend to ju
On Friday 03 July 2009 00:15:33 Rudolf Marek wrote:
> > Maybe Rudolf Marek can us help here, because he wrote the automatic
> > generation for that ACPI table (SSDT).
>
> Hi,
>
> If I understand correctly, the 1800MHz is missing? If so, please check what
> is the portal frequency for this CPU. Mayb
On Thursday 02 July 2009 23:26:34 Peter Stuge wrote:
> Harald Gutmann wrote:
> > > Is the port interrupt-driven, or polling, on your system, Andreas?
> >
> > Here on my system it says also polling, like on Andreas system.
> > What is the difference between interrupt driven and polling?
>
> Interrup
Uwe Hermann wrote:
Nice, thanks! We didn't yet have a dump from an A8000, nice to see that
the code seems to work ok. Will link to it in the superiotool wiki page.
Glad I could be of some help!
I'm afraid this board will not be supported anytime soon.
Oh well, thanks for letting me know
On Fri, Jul 03, 2009 at 02:08:08AM +, Goboster wrote:
> I've got a HP Pavilion desktop that has an ASUS OEM motherboard model
> A8M2N-LA.
> Manufacturer details are here (there is a nice schematic):
> http://tr.im/qHw7
>
> It appears to have an MCP51 southbridge, ASUS A8000 SuperIO, a "GeForc
On Sun, Jun 28, 2009 at 12:49:09AM -0700, Warren Turkal wrote:
> The following is the output I get when trying to compile coreinfo.
>
> w...@mediakitchen:~/projects/coreboot/coreinfo$ make
> CC build/cpuinfo_module.o
> AS build/cpuid.S.o
> CC build/pci_module.o
> CC bui
Hi Rudolf ,
I work out some code to make seabios run vgabios when resuming from S3
(follow your advice on IRC, again :) ). And it is unbelievable easy,
only 2 step:
Setp 1: In acpi.c
void acpi_jump_to_wakeup(void *vector)
{
/* just restore the SMP trampoline and continue with wakeup
14 matches
Mail list logo