Re: [coreboot] [patch] A bug in AMD fam10 am2r2 module

Committed, r4430. Zheng -Original Message- From: ron minnich [mailto:rminn...@gmail.com] Sent: Friday, July 17, 2009 1:33 PM To: Bao, Zheng Cc: Coreboot Subject: Re: [coreboot] [patch] A bug in AMD fam10 am2r2 module Acked-by: Ronald G. Minnich -- coreboot mailing list: coreboot@co

[coreboot] [v2] r4430 - trunk/coreboot-v2/src/northbridge/amd/amdmct/mct

Author: zbao Date: 2009-07-17 07:41:34 +0200 (Fri, 17 Jul 2009) New Revision: 4430 Modified: trunk/coreboot-v2/src/northbridge/amd/amdmct/mct/mctardk4.c Log: This is an obvious bug which I overlooked when I worked on the AM2r2 modules. Signed-off-by: Zheng Bao Acked-by: Ronald G. Minnich M

Re: [coreboot] [patch] A bug in AMD fam10 am2r2 module

Acked-by: Ronald G. Minnich -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [patch] A bug in AMD fam10 am2r2 module

This is an obvious bug which I overlooked when I worked on the AM2r2 modules. Zheng Signed-off-by: Zheng Bao Index: src/northbridge/amd/amdmct/mct/mctardk4.c === --- src/northbridge/amd/amdmct/mct/mctardk4.c (revision 4427) +++ s

Re: [coreboot] [patch] LAB support for Asus M2V-MX SE

> Okay, the thing is that the other motherboards I've seen with LAB > support do have it defined the same way as I did. I'll see if they are > also having the same option duplicated in Options.lb and are just > overriding in here. I did some of that. I didn't understand where to put defaults at th

Re: [coreboot] [patch] [AMD Fam10] Fix confused RB-C2 and DA-C2

RB-C2 probably uses socket type AM3, which is not supported in Coreboot currently. I wonder if your board can go through the whole image. You can contact tim.per...@amd.com about the patch releasing. Zheng -Original Message- From: Ward Vandewege [mailto:w...@gnu.org] Sent: Thursday, Jul

Re: [coreboot] add pretty cpu name for Athlon X2 5050e

On 16.07.2009 23:29, Ward Vandewege wrote: > See attached. I'm not sure if I could predict the IDs for the > 4050e/4450e/4850e - anyone know? I only have a 5050e. > The doc you're looking for is http://support.amd.com/us/Processor_TechDocs/33610_PUB_Rev3%2042v3.pdf Table 8 should have the info

Re: [coreboot] [patch] LAB support for Asus M2V-MX SE

On Thu, 2009-07-16 at 14:45 -0600, Myles Watson wrote: > > The attached patch enables LAB for this motherboard in coreboot-v2. > > Should I change the ROM size or leave it as it is? > > I would leave it as it works for you. Ok, I will. > > Also, Carl Daniel said something about CONFIG_XIP_ROM_SIZ

[coreboot] add pretty cpu name for Athlon X2 5050e

See attached. I'm not sure if I could predict the IDs for the 4050e/4450e/4850e - anyone know? I only have a 5050e. Thanks, Ward. -- Ward Vandewege Free Software Foundation - Senior Systems Administrator Add pretty name for AMD Athlon(tm) 64 X2 Dual Core Processor 5050e. Boot tested. Signed-

Re: [coreboot] [patch] Buildrom support for Asus M2V-MX SE

Acked-by: Ronald G. Minnich -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [patch] Buildrom support for Asus M2V-MX SE

Here's the patch: http://panzer.utcluj.ro/cgi-bin/cgit.cgi/avatt/patch/?id=1f45b765097fd8ba2139a078bd57679e16ac4699 Signed-off by: Cristi Măgherușan I'm unable to say which others may worth it, but someone who's interested by buildrom can also cherry-pick some changesets/patches from my git re

Re: [coreboot] [patch] LAB support for Asus M2V-MX SE

> The attached patch enables LAB for this motherboard in coreboot-v2. > Should I change the ROM size or leave it as it is? I would leave it as it works for you. > Also, Carl Daniel said something about CONFIG_XIP_ROM_SIZE calculation. > Is it ok if I just hardcode it to 64KB? Do you need to chan

[coreboot] [patch] LAB support for Asus M2V-MX SE

Hi folks, The attached patch enables LAB for this motherboard in coreboot-v2. Should I change the ROM size or leave it as it is? Also, Carl Daniel said something about CONFIG_XIP_ROM_SIZE calculation. Is it ok if I just hardcode it to 64KB? Signed-of by: Cristi Măgherușan --- a/src/mainboard/as

Re: [coreboot] failover only for s2895

On Thu, Jul 16, 2009 at 9:46 AM, ron minnich wrote: > On Thu, Jul 16, 2009 at 8:42 AM, Myles Watson wrote: > > I had always misunderstood failover. I thought it was the last resort if > > normal & fallback didn't work. It actually is just a minimal image that > > chooses whether to run normal o

[coreboot] [v2] r4427 - trunk/coreboot-v2/src/mainboard/tyan/s2895

Author: myles Date: 2009-07-16 17:53:11 +0200 (Thu, 16 Jul 2009) New Revision: 4427 Added: trunk/coreboot-v2/src/mainboard/tyan/s2895/failover.c Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/Config.lb trunk/coreboot-v2/src/mainboard/tyan/s2895/cache_as_ram_auto.c Log: Separate cach

Re: [coreboot] failover only for s2895

On Thu, Jul 16, 2009 at 8:42 AM, Myles Watson wrote: > I had always misunderstood failover.  I thought it was the last resort if > normal & fallback didn't work.  It actually is just a minimal image that > chooses whether to run normal or fallback. that's why I never liked the name :-) It's confu

[coreboot] failover only for s2895

I had always misunderstood failover. I thought it was the last resort if normal & fallback didn't work. It actually is just a minimal image that chooses whether to run normal or fallback. This patch makes that clear for the s2895 by separating the files. I like it much better. I'm eventually p

Re: [coreboot] Problem with objcopy: cannot generate coreboot.strip

The cause of a 2^32 file can be that gcc has been upgraded and is generating new section names that are not covered in our ldscripts. I fixed this problem recently in another context. The new sections will get linked at address 0. I think your accidental 0 idea is correct. Can you do a readelf on

Re: [coreboot] Fwd: sony vaio pcg sr1k

if you really want this you'll need to tear the laptop open and set up some way to safely flash -- meaning, a way to recover from failures. You need to temporarily sacrifice at least one laptop to the cause. I doubt you want to do that :-) sorry ron -- coreboot mailing list: coreboot@coreboot.

Re: [coreboot] Problem with objcopy: cannot generate coreboot.strip

Myles Watson wrote: On Thu, Jul 16, 2009 at 8:33 AM, Jeffrey C. Jacobs mailto:jac...@itd.nrl.navy.mil>> wrote: Myles Watson wrote: On Thu, Jul 16, 2009 at 6:55 AM, Jeffrey C. Jacobs mailto:jac...@itd.nrl.navy.mil>

Re: [coreboot] Problem with objcopy: cannot generate coreboot.strip

On Thu, Jul 16, 2009 at 8:33 AM, Jeffrey C. Jacobs wrote: > Thanks for your reply, Myles! No problem. > Myles Watson wrote: > >> On Thu, Jul 16, 2009 at 6:55 AM, Jeffrey C. Jacobs < >> jac...@itd.nrl.navy.mil > wrote: >> >> >>gcc -m32 -nostdlib -n

Re: [coreboot] [patch] [AMD Fam10] Fix confused RB-C2 and DA-C2

Hi Zheng, On Thu, Jul 16, 2009 at 03:40:49PM +0800, Bao, Zheng wrote: > This patch is about the DA-C2 and RB-C2. Chip with install processor > Revision ID of 0x100F62 is DA-C2, instead of RB-C2 which was incorrectly > defined in raminit_amdmct.c. RB-C2's ID is 0x100F42. The Erratas applied > to th

Re: [coreboot] Problem with objcopy: cannot generate coreboot.strip

Thanks for your reply, Myles! Myles Watson wrote: On Thu, Jul 16, 2009 at 6:55 AM, Jeffrey C. Jacobs mailto:jac...@itd.nrl.navy.mil>> wrote: gcc -m32 -nostdlib -nostartfiles -static -o linuxbios -T ldscript.ld crt0.o /usr/bin/ld: warning: dot moved backwards before

Re: [coreboot] Problem with objcopy: cannot generate coreboot.strip

On Thu, Jul 16, 2009 at 6:55 AM, Jeffrey C. Jacobs wrote: > I was wondering if anyone could help me with a couple problems I'm having > building Coreboot at the moment. Foremost, since I upgraded to SVN revision > 4426, I've been unable to generate the stripped form of my BIOS in this or a > prev

[coreboot] Problem with objcopy: cannot generate coreboot.strip

I was wondering if anyone could help me with a couple problems I'm having building Coreboot at the moment. Foremost, since I upgraded to SVN revision 4426, I've been unable to generate the stripped form of my BIOS in this or a previously working very old edition (circa revision 2539 when thing

Re: [coreboot] Fwd: sony vaio pcg sr1k

I have the same problem, I have a vaio vgn-fz21m and I hate its own bios. Since it may be misunderstood, I would like to choose the best words to express my need. I can even donate some money to coreboot if someone is willing to write smthing. :) Please write it for us :) I really, really hate sony

[coreboot] #144: GWNrhCTD

#144: GWNrhCTD --+- Reporter: yehcadusm | Owner: somebody Type: defect | Status: new Priority: major | Milestone: flashrom

[coreboot] #143: GWNrhCTD

#143: GWNrhCTD --+- Reporter: yehcadusm | Owner: somebody Type: defect | Status: new Priority: major | Milestone: flashrom