Am 21.08.2009 04:32, schrieb Kevin O'Connor:
I believe it is possible to add USB keyboard support to SeaBIOS
without requiring SMM mode. I believe a regular usb keyboard driver
will work fine.
That fails because many systems use port 0x60/0x64 as soon as they can,
instead of the BIOS interf
-- Forwarded message --
From: Daniel Toussaint
Date: Fri, Aug 21, 2009 at 2:33 PM
Subject: Re: [coreboot] AMD RS690 TMDS
To: Karl-Heinz Nirschl
Hello,
Meanwhile one of my team members has solved the problem, the info was all in
the BIOS porting guide, it was just not very obvio
The code was waiting for status that doesn't get returned.
Stefan,
This should be correct. Can you try it out on a few of your problem
KBCs/keyboards?
Signed-off-by: Marc Jones
-Marc
--
http://marcjonesconsulting.com
kbcfix.patch
Description: Binary data
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coreboot mailing list: coreboo
On Thu, Aug 20, 2009 at 02:06:07PM +0200, Stefan Reinauer wrote:
> Harrison, Jon (SELEX GALILEO, UK) schrieb:
>> I'm now trying to decide whether I fancy my chances of adding CBFS
>> support to FILO or USB keyboard to SeaBIOS more !!!
>>
> USB keyboard support for SeaBIOS will require that you e
On Thu, Aug 20, 2009 at 11:50:46AM -0600, Myles Watson wrote:
> Kevin,
>
> Have you implemented a streamlined boot process for SeaBIOS with a payload
> in CBFS?
>
> Jon would like to boot Filo as quickly as possible after SeaBIOS runs his
> ROMs. What would you suggest?
It's possible to set CON
let's start over. can you tell me what changes you have made to the
tree at this time?
ron
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I'll take that patch. It makes sense to fill the FLASH from the top down.
Thanks
ron
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Hello,
recently I'm trying to add Kconfig support to the M57SLI board from gigabyte,
but right now i stumbled into an error where I can't figure out what is wrong.
This problem is not directly related to Kconfig, but it seems that I
misunderstand something in the compiler errors, or that I'm no
Patrick, all
> > - When a payload is parsed and added in the CBFS rom, is there any way
> > to know if this is 32 or 64 code ? I added a field elfclass in the
> > cbfs_payload structure to keep the information.
> >
> Sounds good to me, that's what the subheaders are for.
I just send some patc
Hi guys
This series of patches adds support for 64 bits payloads. With them, it
is possible to use a 64 bit payload. It works with old elf boot process
and new CBFS selfboot. With CBFS, when parsing the ELF, the elfclass
will be stored in a new field of the cbfs_payload structure. This field
is us
hi,
the problem has been resolved...the cat /menu.lst works fine.
status now is while loading kernel, it crashed
On Thu, Aug 20, 2009 at 10:37 PM, Jason Wang wrote:
> usb blocks :3907583
> CHS = 243/255/63
>
> On Thu, Aug 20, 2009 at 8:44 PM, Kevin O'Connor wrote:
>
>> On Thu, Aug 20, 20
ron
Change the intel cpu makefile.inc so that it fits the model better.
- intel/Makefile.inc only mentions sockets
- those sockets are conditionally included
- makefile.inc in socket directories are almost all unconditionally included
- Get rid of if where possible, use -$(CONFIG_VARIABLE) instead
Author: rminnich
Date: 2009-08-20 20:05:31 +0200 (Thu, 20 Aug 2009)
New Revision: 4559
Added:
trunk/coreboot-v2/src/cpu/via/model_c3/Kconfig
trunk/coreboot-v2/src/cpu/via/model_c3/Makefile.inc
trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig
trunk/coreboot-v2/src/mainboard/via/epia-n
oh-ho-hohhh this words sounds like a judgement sentence for my hardware...
please, please do something =) i can't watch my motherboard
she absolutly dead... i can't see that.
why? why she not supported? southbridge, main chipset and super i/o
chip are similar
2009/8/20 Myles Wats
Kevin,
Have you implemented a streamlined boot process for SeaBIOS with a payload
in CBFS?
Jon would like to boot Filo as quickly as possible after SeaBIOS runs his
ROMs. What would you suggest?
Thanks,
Myles
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> I have a motherboard from unknown manufacturer based on the AMD Geode
> LX 800 and the CS5536 with Winbond W83627HG
We don't have your board supported. We have several similar boards
with the Geode LX, cs5536, and w83627hf.
digitallogic/msm800sev
amd/db800
pcengines/alix1c
iei/pcisa-lx-800-r10
On Thu, Aug 20, 2009 at 4:45 AM, Arnaud Maye wrote:
> Well this is not making a lot of sense so far, The VGA is anyway not
> working... I will provide a patch as soon I get everything to operate.
If we see the patch sooner, we can try to head off any wrong
directions you might find yourself in.
Greets to COREBOOT!
Please help me!
I have a motherboard from unknown manufacturer based on the AMD Geode
LX 800 and the CS5536 with Winbond W83627HG
And the ROM BIOS of this motherboard are broken. Could you send me the
binary IMAGE of ROM BIOS for my motherboard?
I hope this image help me retur
On Thu, 20 Aug 2009, Carl-Daniel Hailfinger wrote:
On 20.08.2009 04:08, Russell Whitaker wrote:
On Wed, 19 Aug 2009, Jason Wang wrote:
After fixing the problem of usbrom int13 AH=08, Now the usbrom can
return correct of CHS parameters. "error 21 "have been resolved, but
now the
problem is "e
In need to be able to chose between FILO OR A.N Other Payload at boot
time using a USB keyboard.
Patrick has just released a FILO patch adding CBFS support. I think that
this will do the trick for me.
FYI I have a basic SeaBIOS capabilility which I'll release as a patch
with a CONFIG_ option to k
> OK. So I seem to have got my build deploying seaBIOS (0.4.1) , but
> appear to have hit a major obstacle.
>
> No USB Keyboard Support!? This is a complete show stopper for me.
What gives you USB Keyboard support now? Filo?
What if you launch Filo from SeaBIOS non-interactively? SeaBIOS would
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer "oxygene" checked in revision 4558 to
the coreboot repository. This caused the following
changes:
Change Log:
20090819-2-trim-down-cbfs:
CBFS uses sprintf, which requires vtxprintf, which requires (in the
curre
> The ep80579 has two x4 lanes peripherals (00:02.0 and 00:03.0) both of
You mean the i3100 here, right?
> them having a register 0x3E. If you set
> ISAEN on 00:02.00 you have to set ISAEN on 00:03.00 as well. This is a
> requirement provided by Intel in fact.
> It makes sense as the address deco
Nice !!
> -Original Message-
> From: Patrick Georgi [mailto:patr...@georgi-clan.de]
> Sent: 20 August 2009 15:33
> To: coreboot; Harrison, Jon (SELEX GALILEO, UK)
> Subject: [PATCH] Add CBFS support to FILO
>
> *** WARNING ***
>
> This message has originated outsid
Author: oxygene
Date: 2009-08-20 16:48:03 +0200 (Thu, 20 Aug 2009)
New Revision: 4558
Modified:
trunk/coreboot-v2/src/arch/i386/Config.lb
trunk/coreboot-v2/src/arch/ppc/Config.lb
trunk/coreboot-v2/src/arch/ppc/init/ppc_main.c
trunk/coreboot-v2/src/lib/cbfs.c
trunk/coreboot-v2/src/ma
usb blocks :3907583
CHS = 243/255/63
On Thu, Aug 20, 2009 at 8:44 PM, Kevin O'Connor wrote:
> On Thu, Aug 20, 2009 at 05:32:02PM +0800, Jason Wang wrote:
> > hi kevin,
> >Since the CHS/LBA also has been resovled yesterday, now the problems
> is
> > that
> > grub can not load the kenerl by "i
Hi,
attached patch adds CBFS to FILO. Use mem:/path/to/file for access.
Tested with
configfile mem:/menu.lst
after I added with
cbfstool coreboot.rom add menu.lst menu.lst 84
The filetype ID (84 in this case) can be freely chosen as long as it's not 0
Signed-off-by: Patrick Georgi
Regards,
Pa
On Thu, Aug 20, 2009 at 05:32:02PM +0800, Jason Wang wrote:
> hi kevin,
>Since the CHS/LBA also has been resovled yesterday, now the problems is
> that
> grub can not load the kenerl by "invalid or unsupported executable format".
> i tried to cat (hd0,0)/menu.lst. It seems the output is not cor
Carl-Daniel Hailfinger schrieb:
On 20.08.2009 04:08, Russell Whitaker wrote:
On Wed, 19 Aug 2009, Jason Wang wrote:
After fixing the problem of usbrom int13 AH=08, Now the usbrom can
return correct of CHS parameters. "error 21 "have been resolved, but
now the
problem is "error 2" which
Harrison, Jon (SELEX GALILEO, UK) schrieb:
OK. So I seem to have got my build deploying seaBIOS (0.4.1) , but
appear to have hit a major obstacle.
No USB Keyboard Support!? This is a complete show stopper for me.
I've seen a thread from last summer talking about adding USB Kbd
support::
http://
ron minnich wrote:
On Wed, Aug 19, 2009 at 12:27 AM, Arnaud Maye wrote:
OK, there's some things to talk about in here.
Well I've made the patch, added a 13100 specific pci_bus_enable_resources in
pciexp_porta.c and modified
the pcie_ops structure accordingly.
Can we see the patch?
hi kevin,
Since the CHS/LBA also has been resovled yesterday, now the problems is
that
grub can not load the kenerl by "invalid or unsupported executable format".
i tried to cat (hd0,0)/menu.lst. It seems the output is not correct too.
On Wed, Aug 19, 2009 at 9:38 PM, Kevin O'Connor wrote:
>
OK. So I seem to have got my build deploying seaBIOS (0.4.1) , but
appear to have hit a major obstacle.
No USB Keyboard Support!? This is a complete show stopper for me.
I've seen a thread from last summer talking about adding USB Kbd
support::
http://www.coreboot.org/pipermail/coreboot/2008-Dece
On 20.08.2009 04:08, Russell Whitaker wrote:
> On Wed, 19 Aug 2009, Jason Wang wrote:
>> After fixing the problem of usbrom int13 AH=08, Now the usbrom can
>> return correct of CHS parameters. "error 21 "have been resolved, but
>> now the
>> problem is "error 2" which means it can not find the
>> "
On 8/19/09 11:08 PM, Patrick Georgi wrote:
> +static int tohex8(int c)
> +{
> + return (c<=9)?(c+'0'):(c-10+'a');
> +}
> +
> +static void tohex32(int val, char* dest)
> +{
> + dest[0]=tohex8(val>>24);
> + dest[1]=tohex8((val>>16) & 0xff);
> + dest[2]=tohex8((val>>8) & 0xff);
> +
On 8/20/09 2:18 AM, ron minnich wrote:
> See patch
>
> ron
>
Acked-by: Stefan Reinauer
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