Hello,
Does coreboot have any plans to support Ubiquiti embedded boards such as the
Ministation or Litestation2/5? Those board are based on Atheros MIPS
processors.
Thanks,
Shane
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Hi,
I'm doing a project for my car and would like to have a very quick
booting system, therefore coreboot would be ideally suited.
http://en.wikipedia.org/wiki/Pico-ITX#PX1G is the device I'm
targeting but you don't seem to support this, I would like to add this
device, it has:
VIA VX700
Author: stepan
Date: 2009-11-04 13:18:44 +0100 (Wed, 04 Nov 2009)
New Revision: 4908
Added:
trunk/src/cpu/intel/model_106cx/Kconfig
trunk/src/cpu/intel/model_106cx/Makefile.inc
trunk/src/cpu/intel/model_106cx/model_106cx_init.c
trunk/src/cpu/intel/socket_441/Kconfig
Hi Stepan,
Glad to know that you're developing Kontron 986LCD-M/mITX, and i'm trying to
understand this excellent 986LCD-M board using Intel ICH7 as southbridge, i
wanna create the bios image using Coreboot, but I even can't compile it after
several tries.
My platform:
Fedora 8
zhangxc wrote:
Hi Stepan,
Glad to know that you're developing Kontron 986LCD-M/mITX, and i'm trying
to understand this excellent 986LCD-M board using Intel ICH7 as southbridge,
i wanna create the bios image using Coreboot, but I even can't compile it
after several tries.
My
Myles,
I'm not sure what you mean by: Change the hard coded values. Where
should I change them?
Send me the latest output and I'll send you a patch to test.
Thanks,
Myles
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Hi, Myles,
About the HT code, I have a question.
I am debugging my board, which is Fam10+RS780+SB700. The CPU and RS780 are
the two HT node.
Aren't there three? How is the SB700 connected to the RS780?
It seems like the RS690/SB600 board.
The RS690/SB600 board has three.
In
Here's a patch that will either work or help us figure out what's going
wrong.
Signed-off-by: Myles Watson myle...@gmail.com
Thanks,
Myles
Index: svn/src/mainboard/arima/hdama/mptable.c
===
---
Ping.
Mark Marshall wrote:
Below are three small patches, they all seemed useful while I have been
working with VGA option ROMs.
Thanks for the great work.
MM
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Ping.
The two x86emu fixes look fine to me, but I haven't tested them.
I don't think we should depend on the value from the card. The point of
that check is to make sure we don't run the wrong types of ROMs. One way to
work around it would be to correct the VGA BIOS from your card and put it
On Wed, Nov 4, 2009 at 11:02 AM, Myles Watson myle...@gmail.com wrote:
Hi, Myles,
About the HT code, I have a question.
I am debugging my board, which is Fam10+RS780+SB700. The CPU and RS780
are
the two HT node.
Is there a SimNOW config that is close? Could you make one? That would
On Wed, Nov 4, 2009 at 2:48 PM, Hugh Greenberg h...@lanl.gov wrote:
Attached is the latest output. I don't see the errors anymore. I just
tried booting Linux with the latest rom and it booted.
Great! So is everything finally working, or are you still fighting sporadic
hangs?
We should
On Wed, Nov 4, 2009 at 10:02 AM, Myles Watson myle...@gmail.com wrote:
Hi, Myles,
About the HT code, I have a question.
I am debugging my board, which is Fam10+RS780+SB700. The CPU and RS780
are
the two HT node.
Aren't there three? How is the SB700 connected to the RS780?
It seems
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi
Sorry I tried to get it working on K8 but got distracted by the network support
for SerialICE and network console for coreboot ;)
I think I can Acked-by: Rudolf Marek r.ma...@assembler.cz Although I would
prefer to have the wakeup trampoline
Myles,
Everything seems to be working well. I had one sporadic hang while
testing at what looked to be at the same place as the initial first
hang. That was the only instance since I moved to gcc 3.4. We were
testing so many things that I don't remember the exact scenario. I'm
satisfied
On Wed, 04 Nov 2009 23:04:14 +0100, Rudolf Marek r.ma...@assembler.cz
wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi
Sorry I tried to get it working on K8 but got distracted by the network
support
for SerialICE and network console for coreboot ;)
Sorry to get off subject,
On Wed, Nov 4, 2009 at 4:23 PM, Hugh Greenberg h...@lanl.gov wrote:
Myles,
Everything seems to be working well. I had one sporadic hang while testing
at what looked to be at the same place as the initial first hang. That was
the only instance since I moved to gcc 3.4. We were testing so
Attached is the output from svn diff. I'll test it with gcc 4.4 and
let you know if it hangs or not.
--
Hugh Greenberg
Myles Watson wrote:
On Wed, Nov 4, 2009 at 4:23 PM, Hugh Greenberg h...@lanl.gov
mailto:h...@lanl.gov wrote:
Myles,
Everything seems to be working well. I
On Wed, Nov 4, 2009 at 10:02 AM, Myles Watson myle...@gmail.com wrote:
Hi, Myles,
About the HT code, I have a question.
I am debugging my board, which is Fam10+RS780+SB700. The CPU and RS780 are
the two HT node.
Aren't there three? How is the SB700 connected to the RS780?
It seems like
There is just the CPU and 690 or 780. The AMD 600 or 700 is connect
with Alink, not HT.
You're right. I didn't look closely enough.
early_ht.c: Just enumerate the southbridge chain in case that's needed
for
serial initialization or ROM access.
incoherent_ht.c: Enumerate all chains so
Yes, it is still hanging occasionally with a newer gcc. I thought I put
all the debug stuff back in, but I apparently didn't get it all. Below
is the output. I will put the remaining debug statements back in for
this hang again and send the output.
coreboot-2.3 Wed Nov 4 16:40:23 MST
Yes, it is still hanging occasionally with a newer gcc.
Too bad. Occasionally like 1-in-3? I don't have any idea what the compiler
would have to do with non-deterministic hangs.
I thought I put
all the debug stuff back in, but I apparently didn't get it all. Below
is the output. I will
Sometimes it takes a very long time to reproduce. It is very random.
I just tried about 30 times and I was not able to reproduce it. Ok, I
will see if I still need that.
--
Hugh Greenberg
Los Alamos National Laboratory, CCS-1
Email: h...@lanl.gov
Phone: (505) 665-6471
Myles Watson
It doesn't seem like I need the forcing type 1 hack anymore.
I reproduced the hang with some of the debugging statements back in. I
hope that is all you need. Here is the output:
coreboot-2.3 Wed Nov 4 17:28:13 MST 2009 starting...
Enabling routing table for node 00 done.
Enabling SMP
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