Bao, Zheng wrote:
> Now my VGA BIOS seems to run incorrectly.
>
> Without_entry.txt:
> The output of image running with Config.lb like,
> chip southbridge/amd/rs780
> device pci 0.0 on end # HT 0x9600
> device pci 1.0 on end # Internal Graphics P2P bridge 0x9602
>
> With_entry.txt:
Now my VGA BIOS seems to run incorrectly.
Without_entry.txt:
The output of image running with Config.lb like,
chip southbridge/amd/rs780
device pci 0.0 on end # HT 0x9600
device pci 1.0 on end # Internal Graphics P2P bridge 0x9602
With_entry.txt:
The output of image running w
freeman2411 wrote:
> Ok thank you for the information. I will ask the VIA Support if
> they could release the Programming Documentation.
Please do that only when you know for sure that someone (yourself, or
someone else) is prepared to follow through and do the actual
implementation work in corebo
s...@coreboot.org wrote:
> (non-kconfig) build
What remains now, before removing the buildtarget infrastructure?
//Peter
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Patrick Georgi wrote:
> Am 14.11.2009 18:23, schrieb Myles Watson:
>> ROM_IMAGE_SIZE used to be the way you could tell fallback or normal
>> how much space to take. I'm not sure exactly what it does right now.
>
> It's the bootblock size, and must correspond with ROMBASE.
If it will still be the
Hi,
This is to announce that, following approval from RMS, the header in
GRUB 2 that contains Multiboot declarations (multiboot.h) is now being
distributed under the X11 license in latest Bazaar trunk of GNU GRUB.
With this change, we expect make it easier for OS kernel developers
and implemento
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#146 somebody new memalign faild with 4k boundary
#145 somebody new Fix CMOS handling
#144 somebody new TYAN S7012 support
#143 oxygene new unify intel car f
Ok thank you for the information. I will ask the VIA Support if they could
release the Programming Documentation.
Greetings
Freeman
2009/11/15 Sean Nelson
> Sadly, We don't have access to the Programming Documentation needed
> for the KT4 Chipset. Until VIA releases the required chipset docs,
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