[coreboot] cbfstool: Fill memory allocated in create_cbfs_file() with 0xff

2009-12-06 Thread Peter Stuge
See patch. //Peter cbfstool: Fill memory allocated in create_cbfs_file() with 0xff This should improve programming speed a bit. Signed-off-by: Peter Stuge pe...@stuge.se Index: util/cbfstool/common.c === ---

Re: [coreboot] cbfstool: Fill memory allocated in create_cbfs_file() with 0xff

2009-12-06 Thread Stefan Reinauer
On 12/6/09 12:19 PM, Peter Stuge wrote: cbfstool: Fill memory allocated in create_cbfs_file() with 0xff This should improve programming speed a bit. Signed-off-by: Peter Stuge pe...@stuge.se Unfortunately not a measurable improvement here with the Numonyx M25P32 and the Dediprog SF100,

[coreboot] [commit] r4975 - trunk/util/cbfstool

2009-12-06 Thread svn
Author: stuge Date: 2009-12-06 13:14:39 +0100 (Sun, 06 Dec 2009) New Revision: 4975 Modified: trunk/util/cbfstool/common.c Log: cbfstool: Fill memory allocated in create_cbfs_file() with 0xff This should improve programming speed a bit. Signed-off-by: Peter Stuge pe...@stuge.se Acked-by:

Re: [coreboot] cbfstool: Fill memory allocated in create_cbfs_file() with 0xff

2009-12-06 Thread Peter Stuge
Stefan Reinauer wrote: Acked-by: Stefan Reinauer ste...@coresystems.de r4975 -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Getting output from serial..... kinda....

2009-12-06 Thread David Houston
Hi all, Would anyone have any suggestions why all I get out of my serial port when booting my coreboot build is ��FƢ=U$'EM#My=�F⌋!y=�FƋ!y=[$M#MOMy=+_Y�b��#⣉/y=+OIfyy=[$KKOK!K$L���H#C1�b�㢢�VMK$LcDbD�b�#㢉 #㌢

Re: [coreboot] Getting output from serial..... kinda....

2009-12-06 Thread Rudolf Marek
Hi, Please answer following: 1) do you port new motherboard ? 2) if you set speed to 115200 do you see something if you set on the other side 57600 or 28200 bauds? 3) if you set coreboot to 57600 and the other side to 115200 do you get something? 4) Sometimes when the clock is nearly

Re: [coreboot] Getting output from serial..... kinda....

2009-12-06 Thread David Houston
superiotool -d output: Found Winbond W83627EHF/EF/EHG/EG (id=0x88, rev=0x63) at 0x2e Register dump: idx 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 88 63 ff 00 80 00 00 ff 50 04 00 00 00 21 00 ff def 88 MM ff 00 MM 00 MM RR 50 04 00 RR 00 21 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74

Re: [coreboot] Getting output from serial..... kinda....

2009-12-06 Thread Rudolf Marek
Hi, That dump is from orig BIOS? If yes ~0x40 line may work ;) Ok try this somewhere in the begining before enable serial (stolen from a8v-e_se) #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) pnp_enter_ext_func_mode(SERIAL_DEV); /* We have 24MHz input. */ reg =

Re: [coreboot] #150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock

2009-12-06 Thread coreboot
#150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock ---+ Reporter: edwin_beas...@… | Owner: somebody Type: enhancement | Status: new