On 12/8/09 12:58 AM, Andrej Skirn wrote:
> Presently, my main problem seems to be that the
> northbridge/via/vt8623/raminit.h does not define a mem_controller
> struct required by the southbridge code, so the north- and southbridge
> code don't seem to be clearly delimited.
try completely comment
I am working on setting up CoreBoot Compulab's CM-iVCF
computer-on-module. It's essentially like an EPIA-MS board
(http://www.ewayco.com/20-low-cost-embedded-epia-mini-itx-etc-boards/epia-ms-mini-itx-low-cost-via-embedded-boards.html)
but with a WinBond super-IO. I'm aware this is rather old boa
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Hi,
Try experimenting with the position of used memory slots. Maybe you just need to
put DIMMS into right places ;) I think I used the slot closest to CPU then one
empty and then the second DIM and then the closest to edge empty.
Rudolf
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> This board has 4 sockets but only 2 are populated with 1GB dimms each. Could
> the other empty two sockets be the device error, which is generated by the
> smbus_wait_until_ready function? But why would it say that there is no
> memory at all?
I don't know.
> Yet another question, I can see PRI
Myles Watson escribió:
>
>
> worked fine now I'm getting a little further ;) :
>
> Good.
>
>
> coreboot-2.3 Fri Dec 4 20:15:37 CET 2009
> starting...
>
>
> now booting...
> real_main
>
> worked fine now I'm getting a little further ;) :
>
Good.
> coreboot-2.3 Fri Dec 4 20:15:37 CET 2009
> starting...
>
> now booting...
> real_main
>
> core0 started:
> now booting... Core0 started
> started ap apicid:
> SBLink=00
> NC node|link=00
> K8T890 found at LDT 00 Agreed on width: 01
Myles Watson escribió:
>
>> -Original Message-
>> From: Knut Kujat [mailto:kn...@gap.upv.es]
>> Sent: Saturday, December 05, 2009 5:57 AM
>> To: Myles Watson
>> Cc: 'Jonathan Rogers'; coreboot@coreboot.org
>> Subject: Re: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
>>
>> Hi,
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