Re: [coreboot] Geode patch for trunk to fix cache flush and stack jump at copying stage.

2010-01-25 Thread Peter Stuge
Patrick Georgi wrote: > Thank you for your patch, it's highly appreciated! Agreed! Maybe they will also help Piotr! > As discussed on IRC, please add some comment to each address range > in the array about what kind of configuration is used for it (eg. > "write-back" for 0xa-0xb). Yes.

Re: [coreboot] Memtest86+ failing on coreboot system.

2010-01-25 Thread Myles Watson
> Patrick Georgi escribió: > > Am 25.01.2010 17:13, schrieb Knut Kujat: > > > >> Hi, > >> I would love to send the new board to the list but there are several > >> issues still remaining like: > >> - SMBus gets irq 0 instead of 5 > >> - ACPI not working > >> > > We have lots of boards with (at best

Re: [coreboot] Geode patch for trunk to fix cache flush and stack jump at copying stage.

2010-01-25 Thread ron minnich
This looks good, I assume tested on db800 :-) Edwin, are you the only one out there with one of these? I think it's right but have not touched geode for a year now! I'm ready to ack if you add comments and sign it off. ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.or

Re: [coreboot] Geode patch for trunk to fix cache flush and stack jump at copying stage.

2010-01-25 Thread Patrick Georgi
Thank you for your patch, it's highly appreciated! As discussed on IRC, please add some comment to each address range in the array about what kind of configuration is used for it (eg. "write-back" for 0xa-0xb). Also, we need a Sign-off before we can commit it to the repository, with which

[coreboot] Geode patch for trunk to fix cache flush and stack jump at copying stage.

2010-01-25 Thread Edwin Beasant
coreboot-trunk-geode-lx-cache-fix.patch Description: coreboot-trunk-geode-lx-cache-fix.patch -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Memtest86+ failing on coreboot system.

2010-01-25 Thread Knut Kujat
Patrick Georgi escribió: > Am 25.01.2010 17:13, schrieb Knut Kujat: > >> Hi, >> I would love to send the new board to the list but there are several >> issues still remaining like: >> - SMBus gets irq 0 instead of 5 >> - ACPI not working >> >> > We have lots of boards with (at best) inco

Re: [coreboot] Memtest86+ failing on coreboot system.

2010-01-25 Thread Patrick Georgi
Am 25.01.2010 17:13, schrieb Knut Kujat: > Hi, > I would love to send the new board to the list but there are several > issues still remaining like: > - SMBus gets irq 0 instead of 5 > - ACPI not working > We have lots of boards with (at best) incomplete ACPI support. That shouldn't stop you fro

Re: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"

2010-01-25 Thread coreboot
#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram" +--- Reporter: edwin_beas...@… | Owner: somebody Type: defect |Status: new

Re: [coreboot] Memtest86+ failing on coreboot system.

2010-01-25 Thread Knut Kujat
Hi, I would love to send the new board to the list but there are several issues still remaining like: - SMBus gets irq 0 instead of 5 - ACPI not working - booting interrupts for about 4 minutes on "Stage: loading fallback/coreboot_ram @ 0x20 (360448 bytes), entry @ 0x20" and the strangest

Re: [coreboot] [PATCH]even more kconfig

2010-01-25 Thread Stefan Reinauer
On 1/25/10 1:34 PM, Patrick Georgi wrote: > Hi, > > attached patch takes care of the UDELAY configuration in kconfig. It > also fixes: > - acpi table build on a couple of boards (introduced by one of the > earlier patches) > - build error due to missing init_timer() on amd/sc520 systems > > The onl

[coreboot] [commit] r5053 - in trunk/src/northbridge/intel: e7520 e7525

2010-01-25 Thread svn
Author: stepan Date: 2010-01-25 14:15:17 +0100 (Mon, 25 Jan 2010) New Revision: 5053 Removed: trunk/src/northbridge/intel/e7520/raminit_test.c trunk/src/northbridge/intel/e7525/raminit_test.c Modified: trunk/src/northbridge/intel/e7520/Config.lb trunk/src/northbridge/intel/e7525/Config

[coreboot] [PATCH]even more kconfig

2010-01-25 Thread Patrick Georgi
Hi, attached patch takes care of the UDELAY configuration in kconfig. It also fixes: - acpi table build on a couple of boards (introduced by one of the earlier patches) - build error due to missing init_timer() on amd/sc520 systems The only difference in UDELAY configuration to newconfig is via/e

[coreboot] [commit] r5052 - in trunk: src/cpu/amd/socket_754 src/cpu/amd/socket_939 src/cpu/amd/socket_940 src/mainboard src/mainboard/amd/db800 src/mainboard/amd/pistachio src/mainboard/amd/serengeti

2010-01-25 Thread svn
Author: oxygene Date: 2010-01-25 11:50:21 +0100 (Mon, 25 Jan 2010) New Revision: 5052 Modified: trunk/src/cpu/amd/socket_754/Kconfig trunk/src/cpu/amd/socket_939/Kconfig trunk/src/cpu/amd/socket_940/Kconfig trunk/src/mainboard/Kconfig trunk/src/mainboard/amd/db800/Kconfig trunk/s

Re: [coreboot] [PATCH]kconfig

2010-01-25 Thread Patrick Georgi
Am 25.01.2010 11:31, schrieb Stefan Reinauer: >> +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID >> +hex >> +default 0x15d9 >> +depends on VENDOR_SUPERMICRO >> + >> config MAINBOARD_VENDOR >> string >> default "Technexion" >> > Is there a reason this is in mainboard/Kconfig? >

Re: [coreboot] [PATCH]kconfig

2010-01-25 Thread Stefan Reinauer
On 1/25/10 10:36 AM, Patrick Georgi wrote: > --- src/mainboard/Kconfig (revision 5050) > +++ src/mainboard/Kconfig (working copy) > @@ -287,6 +287,11 @@ > default "Roda" > depends on VENDOR_RODA > > +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID > + hex > + default 0x4352 >

[coreboot] [PATCH]kconfig

2010-01-25 Thread Patrick Georgi
Hi, more changes to make kconfig's configs more similar to newconfig's: DIMM_SUPPORT APIC_ID_OFFSET ACPI_SSDTX_NUM IRQ_SLOT_COUNT MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID (msi/ms9185 has a device id of 0x1022, which would be AMD, but we have a global vendor ID set for msi. which one is right? MSI's