> --> Please help porting all boards from newconfig to Kconfig<--
>
> This is a lot of janitor work and we can use your helping hands.
> The sooner we can get rid of Kbuild, the better. The KBuild report
> on the mailing list shows the config differences between newconfig
> and Kconfig. In theory
On Wed, Feb 03, 2010 at 07:00:25PM +0100, Patrick Georgi wrote:
> Am 03.02.2010 18:50, schrieb Ward Vandewege:
> > This fixes breakage introduced in r5051.
> Sorry for that. I assumed newconfig would be fine:
>
> (Options.lb)
> #make the SB HT chain on bus 0, default is not (0)
> default CONFIG_SB
On Wed, Feb 03, 2010 at 06:52:57PM +0100, Stefan Reinauer wrote:
> On 2/3/10 6:50 PM, Ward Vandewege wrote:
> > This fixes breakage introduced in r5051.
> >
> > Thanks,
> > Ward.
> >
> >
> Sorry for the inconvenience.
>
> Acked-by: Stefan Reinauer
No worries - fixed in r5083 for both newconfi
Author: ward
Date: Thu Feb 4 04:03:39 2010
New Revision: 5083
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5083
Log:
Revision 5051 broke Kconfig booting for the Tyan s2881 board. Up to 5050, there
were two SB_HT_CHAIN_ON_BUS0 sections in the mainboard Kconfig file - one
setting the pa
Author: stepan
Date: Thu Feb 4 02:32:43 2010
New Revision: 5082
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5082
Log:
Move CAR settings for all GX1, GX2, LX and Intel Slot2 boards to the CPU.
This automatically adds the settings for those boards that didn't have settings
at all yet.
Author: uwe
Date: Thu Feb 4 01:55:06 2010
New Revision: 5081
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5081
Log:
Add dump support for the Winbond W83877AF (trivial).
This Super I/O doesn't seem to know the concept of LDNs, it's just a
bunch of registers not splitted into banks/LDN
Author: uwe
Date: Wed Feb 3 23:07:57 2010
New Revision: 5080
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5080
Log:
Supermicro H8QME-2+ (Fam10) whitespace fixes (trivial).
This makes the code more similar to the h8dmr_fam10 target in order to make
the diff between both smaller and mo
Author: uwe
Date: Wed Feb 3 21:52:14 2010
New Revision: 5079
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5079
Log:
Add missing CONFIG_ prefix to make manual QEMU build work (trivial).
Signed-off-by: Uwe Hermann
Acked-by: Uwe Hermann
Modified:
trunk/targets/emulation/qemu-x86/C
Am 03.02.2010 18:50, schrieb Ward Vandewege:
> This fixes breakage introduced in r5051.
Sorry for that. I assumed newconfig would be fine:
(Options.lb)
#make the SB HT chain on bus 0, default is not (0)
default CONFIG_SB_HT_CHAIN_ON_BUS0=0
If you want to change that in newconfig, too, consider bo
Author: oxygene
Date: Wed Feb 3 18:57:55 2010
New Revision: 5078
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5078
Log:
Trivial: In QEmu, the fallback image should USE_FALLBACK_IMAGE.
(fixed buildtarget)
Signed-off-by: Patrick Georgi
Acked-by: Patrick Georgi
Modified:
trunk/ta
Author: oxygene
Date: Wed Feb 3 18:56:37 2010
New Revision: 5077
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5077
Log:
Guards against errors that are hard to track down:
- if crt0s is empty (eg. because crt0-y is still used),
break the build, and say where that behaviour changed
-
On 2/3/10 6:50 PM, Ward Vandewege wrote:
> This fixes breakage introduced in r5051.
>
> Thanks,
> Ward.
>
>
Sorry for the inconvenience.
Acked-by: Stefan Reinauer
--
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: i...@core
This fixes breakage introduced in r5051.
Thanks,
Ward.
--
Ward Vandewege
Free Software Foundation - Senior Systems Administrator
Revision 5051 broke Kconfig booting for the Tyan s2881 board. Up to 5050, there
were two SB_HT_CHAIN_ON_BUS0 sections in the mainboard Kconfig file - one
setting the
Author: uwe
Date: Wed Feb 3 18:25:34 2010
New Revision: 5076
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5076
Log:
Fix incorrect board names in Kconfig strings (trivial).
Signed-off-by: Uwe Hermann
Acked-by: Uwe Hermann
Modified:
trunk/src/mainboard/tyan/s2880/Kconfig
trunk
Hi,
Will coreboot work on a mobo HannStar J MV-4 94V-O ?
It's about a laptop Acer aspire 5720 with Intel Core 2 Duo processor T5250
(1.5 GHz, 667 MHz FSB, 2 MB L2 cache).
Below the output of 'lspci -tvnn' :
-[:00]-+-00.0 Intel Corporation Mobile PM965/GM965/GL960 Memory
Controller Hub [80
Patrick Georgi escribió:
> Am 03.02.2010 14:53, schrieb Knut Kujat:
>
>> Hi,
>> hope thats how it works for adding a patch to the list so if something
>> is wrong let me know.
>>
> The procedure is fine.
>
> I copied a newer version of h8dmr_fam10's Makefile.inc to the
> h8qme_fam10 tree,
Am 03.02.2010 14:53, schrieb Knut Kujat:
> Hi,
> hope thats how it works for adding a patch to the list so if something
> is wrong let me know.
The procedure is fine.
I copied a newer version of h8dmr_fam10's Makefile.inc to the
h8qme_fam10 tree, otherwise it's fine.
Acked-by: Patrick Georgi
an
#152: v3 Geode cs5536 UART2 wrongly configured
+---
Reporter: edwin_beas...@… | Owner: carldani
Type: defect |Status: new
Author: oxygene
Date: Wed Feb 3 14:49:24 2010
New Revision: 5074
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5074
Log:
The UART2 on the AMD cs5536 is incorrectly configured in two places.
GPIO lines 4 and 3 are swapped and also incorrectly put in IR mode receive
(compound fault).
S
Tested on Norwich-type board as working.
Acked-by: Edwin Beasant
From: coreboot-boun...@coreboot.org [mailto:coreboot-boun...@coreboot.org] On
Behalf Of Stefan Reinauer
Sent: 03 February 2010 13:20
To: coreboot
Subject: [coreboot] [PATCH] (resend to mailing list
See patch.
fixup patch from ticket #152 for coreboot trunk
(http://tracker.coreboot.org/trac/coreboot/ticket/152)
Signed-off-by: Stefan Reinauer
Index: src/southbridge/amd/cs5536/cs5536_early_setup.c
===
--- src/southbridge/amd/cs55
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