On Sat, Feb 13, 2010 at 10:36 AM, Peter Bannis wrote:
> romcc generates wrong code in pc97317_early_serial_init.c
> /* Wait for the clock to stabilise */
> while(!inb(PM_BASE + 1 & 0x80))
> ;
Should this be
while(!(inb(PM_BASE + 1) & 0x80))
or some such? You're doing an i
> Date: Sat, 13 Feb 2010 11:23:49 -0700
> Subject: Re: [coreboot] Data in memory changes unexpectedly ininitialize_cpus
> From: marcj...@gmail.com
> To: fishb...@hotmail.com
> CC: coreboot@coreboot.org
>
> 2010/2/12 Zheng Bao :
> >
> >
> >> Date: Fri, 12 Feb 2010 16:54:43 -0700
> >> From: mar
Zheng,
can you try if the RS780 code works with a uniprocessor K8 (not Fam10) CPU?
Maybe that gives us a better baseline for testing.
Regards,
Carl-Daniel
--
Developer quote of the year:
"We are juggling too many chainsaws and flaming arrows and tigers."
--
coreboot mailing list: coreboot@co
The 'make defconfig' target was broken in coreinfo. Attached patch adds
the defconfig.
Signed-off-by: Christopher Kilgour
Index: configs/defconfig
===
--- configs/defconfig (revision 0)
+++ configs/defconfig (revision 0)
@@ -0
Hi,
My last successful build for the Televideo/TC7010 was r3147. The TC7010
differs little from the TC7020. I have put in some hours trying to figure
out why but no success yet. The changes I have noticed :
CBFS
Changes in crt0_includes.h where failover and auto.inc ( romstage.inc )
are cal
On Fri, Feb 12, 2010 at 4:23 PM, Peter Stuge wrote:
> Marc Jones wrote:
>> I was having problems building a working romcc with the -O2
>> optimization flag on ubuntu hardy. It was causing this error building
>> the bootblock:
>> bootblock.c:49.0:
>> Internal compiler error: low: next != prev?
>>
>
2010/2/12 Zheng Bao :
>
>
>> Date: Fri, 12 Feb 2010 16:54:43 -0700
>> From: marcj...@gmail.com
>> To: zheng@amd.com
>> CC: coreboot@coreboot.org
>> Subject: Re: [coreboot] Data in memory changes unexpectedly
>> ininitialize_cpus
>>
>> On Fri, Feb 12, 2010 at 4:48 PM, Marc Jones wrote:
>> > On
Author: mjones
Date: Sat Feb 13 19:06:29 2010
New Revision: 5124
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5124
Log:
I was having problems building a working romcc with the -O2
optimization flag on ubuntu hardy. It was causing this error building
the bootblock:
bootblock.c:49.0:
Int
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