Dear Joseph,
Am Donnerstag, den 08.04.2010, 02:09 -0400 schrieb Joseph Smith:
1. This patch adds CAR for Intel P6 series processors.
2. Add support for Micro-FCBGA 479 Celeron and PIII's
3. Add support for model_6bx and microcode updates
4. Add support for CAR and Tinybootblock on RCA RM4100
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer oxygene checked in revision 5373 to
the coreboot repository. This caused the following
changes:
Change Log:
Replace sconfig with a C implementation.
(smaller, faster, standard parser generator, no more python)
Author: oxygene
Date: Thu Apr 8 14:00:35 2010
New Revision: 5374
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5374
Log:
Remove duplicate registers in digitallogic/adl855pc's device tree
Create directories before trying to copy files into them
Signed-off-by: Patrick Georgi
On 04/08/2010 02:36 AM, Paul Menzel wrote:
Dear Joseph,
Am Donnerstag, den 08.04.2010, 02:09 -0400 schrieb Joseph Smith:
1. This patch adds CAR for Intel P6 series processors.
2. Add support for Micro-FCBGA 479 Celeron and PIII's
3. Add support for model_6bx and microcode updates
4. Add
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer oxygene checked in revision 5374 to
the coreboot repository. This caused the following
changes:
Change Log:
Remove duplicate registers in digitallogic/adl855pc's device tree
Create directories before trying to
Author: oxygene
Date: Thu Apr 8 14:46:18 2010
New Revision: 5375
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5375
Log:
sconfig: Mangle - to _ for struct names, too.
Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de
Acked-by: Patrick Georgi patrick.geo...@coresystems.de
Author: oxygene
Date: Thu Apr 8 14:47:35 2010
New Revision: 5376
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5376
Log:
cpu/emulation/qemu-x86 doesn't exist anymore, as this
is folded into mainboard/emulation/qemu-x86. Adapt code.
Signed-off-by: Patrick Georgi
Author: oxygene
Date: Thu Apr 8 14:59:41 2010
New Revision: 5377
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5377
Log:
Remove #line statements in processed parser source,
to avoid clutter in revision history.
Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de
Acked-by:
Author: stepan
Date: Thu Apr 8 15:16:32 2010
New Revision: 5378
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5378
Log:
output cosmetics
Signed-off-by: Stefan Reinauer ste...@coresystems.de
Acked-by: Stefan Reinauer ste...@coresystems.de
Modified:
trunk/Makefile
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer oxygene checked in revision 5377 to
the coreboot repository. This caused the following
changes:
Change Log:
Remove #line statements in processed parser source,
to avoid clutter in revision history.
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer stepan checked in revision 5378 to
the coreboot repository. This caused the following
changes:
Change Log:
output cosmetics
Signed-off-by: Stefan Reinauer ste...@coresystems.de
Acked-by: Stefan Reinauer
Author: myles
Date: Thu Apr 8 17:02:39 2010
New Revision: 5379
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5379
Log:
Move Kconfig for HT limits to northbridge/amd/Kconfig.
Guard the code with CONFIG_EXPERT to remove warnings.
Make it only show up for fam10, since it isn't
Author: myles
Date: Thu Apr 8 17:12:18 2010
New Revision: 5382
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5382
Log:
Cosmetically make init_cpus more similar for fam10 and K8.
Remove some fam10 warnings.
Signed-off-by: Myles Watson myle...@gmail.com
Acked-by: Myles Watson
This is not all boards yet, but I send them out so I can go to bed :-)
Here's one for all boards.
Signed-off-by: Myles Watson myle...@gmail.com
Thanks,
Myles
Index: svn/src/mainboard/amd/dbm690t/acpi_tables.c
===
---
I have a lenovo x300 somebody set the password on and ... as you guess, forgot.
So, question: anyone have any idea how deep into the machine the
password is kept no new machines? Deep in TPM?
in other words, were flashrom to work on this box, can the password be reset?
ron
--
coreboot mailing
ron minnich wrote:
I have a lenovo x300 somebody set the password on and ... as you
guess, forgot.
So, question: anyone have any idea how deep into the machine the
password is kept no new machines? Deep in TPM?
in other words, were flashrom to work on this box, can the password
be reset?
On Thu, 8 Apr 2010 18:45:34 +, ron minnich rminn...@gmail.com wrote:
I have a lenovo x300 somebody set the password on and ... as you guess,
forgot.
So, question: anyone have any idea how deep into the machine the
password is kept no new machines? Deep in TPM?
in other words, were
(retry, the first attempt seems to have been eaten by the list daemon)
Hi,
attached patch splits crt0.S.lb, adds the first part of it as first
element of crt0s, adds the second part as last element of crt0s on romcc
boards (it was guarded with #if CONFIG_USE_DCACHE_RAM==0), renames
Acked-by: Stefan Reinauer ste...@coresystems.de
On 4/8/10 10:17 PM, Patrick Georgi wrote:
(retry, the first attempt seems to have been eaten by the list daemon)
Hi,
attached patch splits crt0.S.lb, adds the first part of it as first
element of crt0s, adds the second part as last element of
On 4/8/10 8:09 AM, Joseph Smith wrote:
Signed-off-by: Joseph Smith j...@settoplinux.org
Nice! Thanks, Joseph!
Index: src/cpu/intel/Kconfig
===
--- src/cpu/intel/Kconfig (revision 5372)
+++ src/cpu/intel/Kconfig
Author: oxygene
Date: Thu Apr 8 23:04:45 2010
New Revision: 5383
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5383
Log:
Split crt0.S.lb into prologue and epilogue
(the latter only for romcc), rename crt0_includes.h
to crt0.S, and compile that directly.
Signed-off-by: Patrick Georgi
On Thu, 08 Apr 2010 22:51:25 +0200, Stefan Reinauer ste...@coresystems.de
wrote:
On 4/8/10 8:09 AM, Joseph Smith wrote:
Signed-off-by: Joseph Smith j...@settoplinux.org
Nice! Thanks, Joseph!
Index: src/cpu/intel/Kconfig
On 4/8/10 11:32 PM, Joseph Smith wrote:
Index: src/cpu/intel/model_6bx/Kconfig
===
--- src/cpu/intel/model_6bx/Kconfig (revision 0)
+++ src/cpu/intel/model_6bx/Kconfig (revision 0)
@@ -0,0 +1,3 @@
+config CPU_INTEL_CORE
+
On Thu, 08 Apr 2010 23:37:59 +0200, Stefan Reinauer ste...@coresystems.de
wrote:
On 4/8/10 11:32 PM, Joseph Smith wrote:
Index: src/cpu/intel/model_6bx/Kconfig
===
--- src/cpu/intel/model_6bx/Kconfig(revision 0)
+++
On Thu, 08 Apr 2010 23:37:59 +0200, Stefan Reinauer ste...@coresystems.de
wrote:
On 4/8/10 11:32 PM, Joseph Smith wrote:
Index: src/cpu/intel/model_6bx/Kconfig
===
--- src/cpu/intel/model_6bx/Kconfig(revision 0)
On Thu, 8 Apr 2010 15:45:50 -0600, Myles Watson myle...@gmail.com wrote:
On Thu, 08 Apr 2010 23:37:59 +0200, Stefan Reinauer
ste...@coresystems.de
wrote:
On 4/8/10 11:32 PM, Joseph Smith wrote:
Index: src/cpu/intel/model_6bx/Kconfig
-Original Message-
From: Joseph Smith [mailto:j...@settoplinux.org]
Sent: Thursday, April 08, 2010 3:59 PM
To: Myles Watson
Cc: Stefan Reinauer; coreboot@coreboot.org
Subject: Re: [coreboot] [PATCH] CAR on Intel P6 Series - Support for
model_6bx
On 4/8/10 11:32 PM, Joseph
On Thu, 8 Apr 2010 16:02:09 -0600, Myles Watson myle...@gmail.com
wrote:
-Original Message-
From: Joseph Smith [mailto:j...@settoplinux.org]
Sent: Thursday, April 08, 2010 3:59 PM
To: Myles Watson
Cc: Stefan Reinauer; coreboot@coreboot.org
Subject: Re: [coreboot] [PATCH] CAR
On Thu, Mar 25, 2010 at 12:18:37AM -0400, Keith Hui wrote:
Hi all,
As title. Can someone enter this into the wiki?
Sorry for the delay. I was about to add it, but then noticed you already
got an account and did it.
Some notes below:
On-board hardware
On-board IDE 3.5: Secondary IDE
On Thu, Apr 8, 2010 at 4:12 PM, Joseph Smith j...@settoplinux.org wrote:
On Thu, 8 Apr 2010 16:02:09 -0600, Myles Watson myle...@gmail.com
wrote:
-Original Message-
From: Joseph Smith [mailto:j...@settoplinux.org]
Sent: Thursday, April 08, 2010 3:59 PM
To: Myles Watson
On 08.04.2010 20:45, ron minnich wrote:
I have a lenovo x300 somebody set the password on and ... as you guess,
forgot.
BIOS password or boot password?
So, question: anyone have any idea how deep into the machine the
password is kept no new machines? Deep in TPM?
in other words, were
On 4/8/10 7:07 PM, Myles Watson wrote:
Here's one for all boards.
Signed-off-by: Myles Watson myle...@gmail.com mailto:myle...@gmail.com
Acked-by: Stefan Reinauer ste...@coresystems.de
Index: svn/src/mainboard/amd/dbm690t/acpi_tables.c
Author: myles
Date: Fri Apr 9 05:41:23 2010
New Revision: 5384
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5384
Log:
Copy acpi blobs in two parts to make sure gcc does the right thing.
Signed-off-by: Myles Watson myle...@gmail.com
Acked-by: Stefan Reinauer ste...@coresystems.de
I'm not sure if this will work and it's risky as well, but you might
want to try it out:
In most BIOS, shorting the address pins (or the equivalent of that
act) upon boot will force the machine to boot from the bootblock BIOS.
The bootblock routine usually searches for BIOS binary file to flash,
On Thu, Apr 8, 2010 at 5:03 PM, Stefan Reinauer ste...@coresystems.dewrote:
On 4/8/10 7:07 PM, Myles Watson wrote:
Here's one for all boards.
Signed-off-by: Myles Watson myle...@gmail.com
Acked-by: Stefan Reinauer ste...@coresystems.de ste...@coresystems.de
Rev. 5384
Index:
Attached patch does the following on 440BX RAM init code:
1. Restore DUMPNORTH() macro. dump_pci_device() never really went
away, as romstages for all 440BX boards included lib/debug.c required
for it.
2. Move the NB macro up and changed DUMPNORTH() to use it as well.
3. Resolves a number of TODO
Author: myles
Date: Fri Apr 9 06:01:55 2010
New Revision: 5385
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5385
Log:
Indent model_fxx_init and model_10xx_init.
Signed-off-by: Myles Watson myle...@gmail.com
Acked-by: Myles Watson myle...@gmail.com
Modified:
On Tue, Apr 6, 2010 at 4:21 PM, Myles Watson myle...@gmail.com wrote:
I'm seeing code reads to memset() in coreboot_ram interleaved with byte
writes to somewhere high on the stack (_estack -0x1fC). This is a k8.
It turns out init_processor_name() was being called with the cache
disabled. It
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