Author: stuge
Date: Wed Apr 21 08:23:19 2010
New Revision: 5469
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5469
Log:
This patch adds:
ICH6 Southbridge,
82915 Series Northbridge,
P4 6xx Series CPU
to inteltool
Tested on my Clevo D900T, based on ICH6 and i915P, with a p4 630
Pat Erley wrote:
This patch adds:
ICH6 Southbridge,
82915 Series Northbridge,
P4 6xx Series CPU
to inteltool
Tested on my Clevo D900T, based on ICH6 and i915P, with a p4 630
installed.
Signed-off-by: Pat Erley pat-l...@erley.org
Acked-by: Peter Stuge pe...@stuge.se
Thanks,
Am 20.04.2010 23:49, schrieb Stefan Reinauer:
This starts getting semi comprehensible... maybe a (short) comment why
this is done would be nice..
Done.
Also, does %config or *config work instead of mentioning all configs?
Yes, I didn't want to risk that we add some %config target that needs
On 21.04.2010 05:35, Peter Stuge wrote:
/| /|
___ ___ _ __ ___| |__ ___ ___ | |_
/ __|/ _ \| '__/ _ \ '_ \/ _ \/ _ \| __|
| (__| (_) | | | __/ |_)| (_)| (_) | |_
\___|\___/|_| \___|_.__/\___/\___/ \__|
Bonus points if you can include our
Author: stepan
Date: Wed Apr 21 14:55:47 2010
New Revision: 130
URL: http://tracker.coreboot.org/trac/filo/changeset/130
Log:
fix cramfs compilation
Signed-off-by: Stefan Reinauer ste...@coresystems.de
Acked-by: Stefan Reinauer ste...@coresystems.de
Modified:
trunk/filo/fs/fsys_cramfs.c
On Tue, Apr 20, 2010 at 11:32 PM, Peter Stuge pe...@stuge.se wrote:
Myles Watson wrote:
/| /|
___ ___ _ __ ___| |__ ___ ___ | |_
/ __|/ _ \| '__| _ \ '_ \/ _ \/ _ \| __|
( (__( (_) ) | ( __/ |_) )(_) )(_) ) |_
\___|\___/|_|
Am 21.04.2010 17:45, schrieb Stefan Reinauer:
see patch
Yay!
Acked-by: Patrick Georgi patrick.geo...@coresystems.de
So RAMBASE could be set to 1MB for all boards that use geode?
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On 4/21/10 6:13 PM, Patrick Georgi wrote:
Am 21.04.2010 17:45, schrieb Stefan Reinauer:
see patch
Yay!
Acked-by: Patrick Georgi patrick.geo...@coresystems.de
So RAMBASE could be set to 1MB for all boards that use geode?
Unfortunately not yet... On the artecgroup dbe61 I get
Hi,
Am 21.04.2010 14:44, schrieb Myles Watson:
On Tue, Apr 20, 2010 at 11:32 PM, Peter Stuge pe...@stuge.se wrote:
Myles Watson wrote:
/| /|
___ ___ _ __ ___| |__ ___ ___ | |_
/ __|/ _ \| '__| _ \ '_ \/ _ \/ _ \| __|
( (__( (_) ) | ( __/ |_)
Hi,
Am 21.04.2010 14:44, schrieb Myles Watson:
On Tue, Apr 20, 2010 at 11:32 PM, Peter Stuge pe...@stuge.se wrote:
Myles Watson wrote:
/| /|
___ ___ _ __ ___| |__ ___ ___ | |_
/ __|/ _ \| '__| _ \ '_ \/ _ \/ _ \| __|
( (__( (_) ) | ( __/
Gimp has a converter built in.
Carl-Daniel Hailfinger wrote:
On 21.04.2010 05:35, Peter Stuge wrote:
/| /|
___ ___ _ __ ___| |__ ___ ___ | |_
/ __|/ _ \| '__/ _ \ '_ \/ _ \/ _ \| __|
| (__| (_) | | | __/ |_)| (_)| (_) | |_
\___|\___/|_|
On 4/21/10 8:14 PM, bari wrote:
Bonus points if you can include our hare ;-)
Regards,
Carl-Daniel
@+
@@@
:.+@@@
On Thu, Apr 15, 2010 at 2:04 PM, Dustin Harrison
Question: I thought I read somewhere the ROMCC is no longer used?
Is that
true for the entire project? Because I see that ROMCC is still used
for
romstage.c
I don't know the status of romcc, but it wouldn't be a shock to
discover that a bug
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer stepan checked in revision 5471 to
the coreboot repository. This caused the following
changes:
Change Log:
* clean up all but two warnings on artecgroup dbe61
* integrate vsm init into normal x86.c code (so it
Author: myles
Date: Wed Apr 21 22:36:09 2010
New Revision: 5472
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5472
Log:
Move the prototype for run_vsa.
Signed-off-by: Myles Watson myle...@gmail.com
Acked-by: Myles Watson myle...@gmail.com
Modified:
trunk/src/devices/oprom/x86.c
Author: stepan
Date: Wed Apr 21 22:55:38 2010
New Revision: 5473
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5473
Log:
oops, sorry for the last commit. This commit changes the code to distinguish
between having VSA functionality in the code, and adding a VSA image to the
ROM.
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer stepan checked in revision 5473 to
the coreboot repository. This caused the following
changes:
Change Log:
oops, sorry for the last commit. This commit changes the code to distinguish
between having VSA
Author: stepan
Date: Thu Apr 22 02:52:42 2010
New Revision: 5474
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5474
Log:
fix ARRAY_SIZE issue.
the gx2+5536 issue is still open, and it reveils a serious problem with the
code that was hidden under a bunch of warnings until now.
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer stepan checked in revision 5474 to
the coreboot repository. This caused the following
changes:
Change Log:
fix ARRAY_SIZE issue.
the gx2+5536 issue is still open, and it reveils a serious problem with the
code
Dustin Harrison wrote:
if anyone has some ideas I'll give them a shot in between hacking
the RAM.
It would be interesting to also look at output from a recent version
of romcc compiling the old code, and an old romcc compiling the new
code. That could hint to either a romcc bug or something
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