Author: oxygene
Date: Fri Apr 23 10:03:14 2010
New Revision: 5480
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5480
Log:
Make USE_OPTION_TABLE user visible, so it can be edited.
Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de
Acked-by: Patrick Georgi
On 4/22/10 11:41 PM, Rudolf Marek wrote:
Attached patch adds support for tinybootblock on VT8237* to decode
whole flash
independent of strapping, making larger flashes work. We cannot walk
anything
else than PCI bus 0 because HT is not setup yet.
Signed-off-by: Rudolf Marek
Wow, that's once again great news!
Thanks!
Harald
On Friday 23 April 2010 03:24:43 Bao, Zheng wrote:
DDR3 supporting is added.
More testing need to be done. But we don't have boards that cover
all the options.
Features that have been tested.
The socket AM3 and ASB2.
Single rank and
Author: stepan
Date: Fri Apr 23 19:35:37 2010
New Revision: 5482
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5482
Log:
AMD Socket ASB2 and AM3 support.
Signed-off-by: Zheng Bao zheng@amd.com
Acked-by: Stefan Reinauer ste...@coresystems.de
Added:
Dear Zheng!
A big thank you to you and AMD from me and on behalf of the coreboot
community.
I am very happy to see how great AMD's coreboot support is and has been
for all these years!
I commited your patches as r5481, r5482 and r5483 to the coreboot
repository.
Stefan
On 4/23/10 3:24 AM,
Author: stepan
Date: Fri Apr 23 21:16:30 2010
New Revision: 5484
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5484
Log:
zero warnings days...
Signed-off-by: Stefan Reinauer ste...@coresystems.de
Acked-by: Stefan Reinauer ste...@coresystems.de
Modified:
Author: ruik
Date: Fri Apr 23 22:58:13 2010
New Revision: 5485
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5485
Log:
Attached patch adds support for tinybootblock on VT8237* to decode whole flash
independent of strapping, making larger flashes work. We cannot walk anything
else than
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Thanks,
it is in as Committed revision 5485. While we are at the tinybootblock. Kevin do
you plan to convert the epia-cn too? What about to implement there the PSON
gating so SMB hack is not needed anymore?
Thanks,
Rudolf
-BEGIN PGP
On Fri, Apr 23, 2010 at 09:24:43AM +0800, Bao, Zheng wrote:
DDR3 supporting is added.
Thank you very much. I would thank you more but I'm too busy looking
at what to buy from AMD...
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coreboot mailing list: coreboot@coreboot.org
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Sorry, my cn700 system died, and I've been too busy with other
projects to replace it. I haven't been following the list for a while,
so I don't know what the current state of vga bios loaders can do, and
when I do get back to working on my carpc, I'll most likely be working
on an intel board,
Thanks for the idea Stefan.
I have yet to get SerialICE up, but I did manage to get the Truxton BIOS
into QEMU. Interesting that QEMU exceptions at the same (at least
relative to C code) spot as my board hangs. As a comparison (since so
much of the i3100 code is shared) I was able to get
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