Re: [coreboot] CS5536 write MSR and trigger I/O error

2010-06-17 Thread Peter Stuge
Hello, Li Gen wrote: > I have a main board with cs5536, Which CPU does it have? > and need to write the bios. I would suggest that you use coreboot as firmware. If you require a legacy BIOS environment then you can use coreboot together with SeaBIOS. It works very well. > I use following cod

[coreboot] CS5536 write MSR and trigger I/O error

2010-06-17 Thread Li Gen
Hi, I have a main board with cs5536, and need to write the bios. During the pci devices scaning, I can found cs5536, and the device number is 9. So I use following codes to read and write MSR to configure CS5536. However, I found that I can successfully read the MSR content, but when I write the

Re: [coreboot] request for comments: Gigabyte GA-945PL-S3 (rev. 1.0)

2010-06-17 Thread John Wyzer
On 17/06/10 22:07, Anders Jenbo wrote: > All your chips seams to be supported so getting your board working > shouldn't be to hard. > > As fare as i can see on flashrom.org, the status for writing to "SST > SST25VF040.REMS" is just unknown, if it really doesn't work, then > another option might be

Re: [coreboot] AMD740G - Not supported yet?

2010-06-17 Thread bari
There is actually a good comparison of features here of 740 vs 690: http://en.wikipedia.org/wiki/AMD_700_chipset_series#740G Try it out and let us know what problems you find. Full specs are available for the chipset. -Bari Carl-Daniel Hailfinger wrote: On 17.06.2010 11:17, Stefan Reinauer

Re: [coreboot] Strange ROMCC failure with Rev 5623

2010-06-17 Thread Anders Jenbo
tor, 17 06 2010 kl. 22:14 +0200, skrev Peter Stuge: > ron minnich wrote: > > > What if we just agree that host machines have a lot of RAM, romcc is > > > not a long-running program, and life will be easier if nothing gets > > > freed. > > > How much RAM are we talking about? > > > > Reasonable. Yo

Re: [coreboot] Strange ROMCC failure with Rev 5623

2010-06-17 Thread Peter Stuge
ron minnich wrote: > > What if we just agree that host machines have a lot of RAM, romcc is > > not a long-running program, and life will be easier if nothing gets > > freed. > > How much RAM are we talking about? > > Reasonable. You could at least try it. Use LD_PRELOAD and make free() > a no-op

Re: [coreboot] request for comments: Gigabyte GA-945PL-S3 (rev. 1.0)

2010-06-17 Thread Anders Jenbo
Hi John All your chips seams to be supported so getting your board working shouldn't be to hard. As fare as i can see on flashrom.org, the status for writing to "SST SST25VF040.REMS" is just unknown, if it really doesn't work, then another option might be to find a compatible chip that is support

[coreboot] Has anyone tested Windows Server 2008 with Hyper-V on coreboot(SeaBIOS)

2010-06-17 Thread Jiang Wang
Hi: I want to install Win 2008 server with Hyper-V (64bit OS and requires VT or AMD-V) on a coreboot based mainboard. I found following link : http://www.coreboot.org/SeaBIOS#Windows It only mentioned client version of WINDOWS (xp, vista, 7). Has anyone tested the server versions and Hyper-V? Than

Re: [coreboot] [PATCH] Simplify device enabling and initialization

2010-06-17 Thread Myles Watson
On Wed, Jun 16, 2010 at 6:22 PM, Ward Vandewege wrote: > On Wed, Jun 16, 2010 at 02:50:42PM -0600, Myles Watson wrote: >> This patch breaks the s2881, which was doing some odd acrobatics in >> order to get a device initialized after its parent.  It should be an >> easy fix to do it correctly now,

Re: [coreboot] Strange ROMCC failure with Rev 5623

2010-06-17 Thread Myles Watson
On Thu, Jun 17, 2010 at 10:15 AM, Stefan Reinauer wrote: > On 6/17/10 5:12 PM, Myles Watson wrote: It looks like Patrick found this before: http://www.coreboot.org/pipermail/coreboot/2009-November/054387.html If I take out the free it works fine.  It seems like there must be a

Re: [coreboot] [PATCH] Simplify device enabling and initialization

2010-06-17 Thread Myles Watson
On Thu, Jun 17, 2010 at 2:04 AM, Peter Stuge wrote: > Myles Watson wrote: >> If we initialize and enable devices in the order that they are found >> in the tree, instead of the order that they were added to the list, it >> simplifies the code.  It also makes it so that removing a device from >> th

[coreboot] [commit] r5633 - in trunk/src: devices drivers/i2c/adt7463 include/device mainboard/emulation/qemu-x86 mainboard/tyan/s2881 northbridge/amd/amdfam10 northbridge/amd/amdk8 northbridge/amd/gx

2010-06-17 Thread repository service
Author: myles Date: Thu Jun 17 18:16:56 2010 New Revision: 5633 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5633 Log: Always enable parent resources before child resources. Always initialize parents before children. Move s2881 code into a driver. Signed-off-by: Myles Watson Acked

Re: [coreboot] Strange ROMCC failure with Rev 5623

2010-06-17 Thread Stefan Reinauer
On 6/17/10 5:12 PM, Myles Watson wrote: >>> It looks like Patrick found this before: >>> http://www.coreboot.org/pipermail/coreboot/2009-November/054387.html >>> >>> If I take out the free it works fine. It seems like there must be a better >>> fix. >>> >> Agreed. >> >> I took a look at th

Re: [coreboot] Strange ROMCC failure with Rev 5623

2010-06-17 Thread ron minnich
On Thu, Jun 17, 2010 at 8:12 AM, Myles Watson wrote: > What if we just agree that host machines have a lot of RAM, romcc is > not a long-running program, and life will be easier if nothing gets > freed.  How much RAM are we talking about?  It might be easier to > debug if nothing gets zeroed. Re

Re: [coreboot] Strange ROMCC failure with Rev 5623

2010-06-17 Thread Myles Watson
>> It looks like Patrick found this before: >> http://www.coreboot.org/pipermail/coreboot/2009-November/054387.html >> >> If I take out the free it works fine.  It seems like there must be a better >> fix. > > Agreed. > > I took a look at this a little bit with Stefan and he helped me track where

Re: [coreboot] Porting to Asus M4A785-M

2010-06-17 Thread Myles Watson
> Yes, here it is attached. It is copied and modified from AMD Tilapia > mainboard, because that seemed to be a close relative. Thanks. > Meanwhile, I added call to it8712f_kill_watchdog() , like Rudolf Marek > suggested. That changed the behavior so that the machine no longer > reboots in the mi

Re: [coreboot] Porting to Asus M4A785-M

2010-06-17 Thread Juhana Helovuo
On Wed, 2010-06-16 at 14:04 -0600, Myles Watson wrote: > On Wed, Jun 16, 2010 at 1:55 PM, Juhana Helovuo wrote: > > On Wed, 2010-06-16 at 08:30 -0600, Myles Watson wrote: > >> > Coreboot now boots past the romstage and starts setting up PCI devices. > >> > Unfortunately, it crashes at some point d

Re: [coreboot] jetway PA78VM5 spi flashing

2010-06-17 Thread Qing Pei Wang
I tried another board, it's ok... it may because of the flashchip. On Thu, Jun 17, 2010 at 7:41 PM, Peter Stuge wrote: > Qing Pei Wang wrote: > > hi, > > it's external flash programmer SF100 and SB700 > > Same problem both with SF100 and onboard flashing? > > That could mean that the flash chi

Re: [coreboot] Will my board be supported?

2010-06-17 Thread Alexander Hug
Hello Peter, hello list! Thanks for the fast answer! I have a bad feeling because the K_8_T890 is for AMD64 Platform, while KT880 (w/o "8") is for "old" socket A processors ... but maybe it is just a further development of the old one. Has somebody experience in getting technical documents

Re: [coreboot] jetway PA78VM5 spi flashing

2010-06-17 Thread Peter Stuge
Qing Pei Wang wrote: > hi, > it's external flash programmer SF100 and SB700 Same problem both with SF100 and onboard flashing? That could mean that the flash chip is bad. //Peter -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] jetway PA78VM5 spi flashing

2010-06-17 Thread Qing Pei Wang
hi, it's external flash programmer SF100 and SB700 On Thu, Jun 17, 2010 at 6:08 PM, Peter Stuge wrote: > Hello, > > Qing Pei Wang wrote: > > Recently i found that the mainboard which i used(Jetway PA78VM-H-LF) > > is not stable, most of the spi flashing caused data error. > > the data writing

Re: [coreboot] jetway PA78VM5 spi flashing

2010-06-17 Thread Peter Stuge
Hello, Qing Pei Wang wrote: > Recently i found that the mainboard which i used(Jetway PA78VM-H-LF) > is not stable, most of the spi flashing caused data error. > the data writing is ok, but the bios data does not as the same as the > original. the SPI FLASH is Winbond W25X80A Is the flash chip fl

Re: [coreboot] Will my board be supported?

2010-06-17 Thread Peter Stuge
Hi Alexander, Alexander Hug wrote: > I am interested in Coreboot and want to try it on my "old" desktop. > It is an "ASUS A7V880", but i cannot find it in the list of boards. Basically the answer is no, your board will not be supported, unless you help add the support for it! :) The K8T890 chips

Re: [coreboot] AMD740G - Not supported yet?

2010-06-17 Thread Carl-Daniel Hailfinger
On 17.06.2010 11:17, Stefan Reinauer wrote: > On 6/17/10 3:15 AM, GS Hunt wrote: > >> I noticed that there is still a request for AMD740G chipset info almost >> a year later after I first posted some info regarding it. Is it in limbo >> now? >> >> > I doubt anybody was ever working on th

[coreboot] Can not add bug report via website.

2010-06-17 Thread Greg.Chandler
I've tried to add this several times to via the bug report tool on the website, but get stuck in a loop on the captcha page. Can I post this here to get it looked at? Filo does not boot from the CF or PCMCIA controllers. I did find a work around, some 70 prom flashes later.. I've limited the

Re: [coreboot] AMD740G - Not supported yet?

2010-06-17 Thread Stefan Reinauer
On 6/17/10 3:15 AM, GS Hunt wrote: > I noticed that there is still a request for AMD740G chipset info almost > a year later after I first posted some info regarding it. Is it in limbo > now? > I doubt anybody was ever working on this. There is, however, support for AMD's RS780 chipset which migh

Re: [coreboot] [PATCH] Simplify device enabling and initialization

2010-06-17 Thread Peter Stuge
Myles Watson wrote: > If we initialize and enable devices in the order that they are found > in the tree, instead of the order that they were added to the list, it > simplifies the code. It also makes it so that removing a device from > the devicetree.cb file won't change when its resources are en