Joseph Smith wrote:
> http://www.coreboot.org/File:Paraflashersch.jpg
libgomp does IPC things. Maybe some IPC resources need to be reset as
the result of a crashed application that didn't get completely
cleaned up.
//Peter
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org
On 6/28/10 5:08 AM, Joseph Smith wrote:
> I am getting this error on the wiki:
>
> http://www.coreboot.org/File:Paraflashersch.jpg
>
> any ideas?
>
http://www.coreboot.org/pipermail/coreboot/2009-March/046030.html
fixed, again, by increasing memory further.
Stefan
--
coresystems GmbH • Brahmss
On Mon, 28 Jun 2010 11:17:34 +0200, Stefan Reinauer
wrote:
> On 6/28/10 5:08 AM, Joseph Smith wrote:
>> I am getting this error on the wiki:
>>
>> http://www.coreboot.org/File:Paraflashersch.jpg
>>
>> any ideas?
>>
>
> http://www.coreboot.org/pipermail/coreboot/2009-March/046030.html
>
> fixe
Author: stepan
Date: Mon Jun 28 12:40:38 2010
New Revision: 5648
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5648
Log:
Run doxygen -u on doxygen configuration files
(make sure we can build images in parallel)
Signed-off-by: Stefan Reinauer
Acked-by: Stefan Reinauer
Modified:
t
Hi Peter,
Thanks for the super fast review!
You wrote:
>> +++ src/southbridge/amd/cs5535/cs5535_early_setup.c (working copy)
>..
>> +static void cs5535_setup_iobase(void)
>> {
>> msr_t msr;
>> + /* setup LBAR for SMBus controller */
>> + msr.hi = 0xf001;
>> + msr.lo = SMBU
hi all,
jetway PA78VM5 have already can successfully load linux kernel, but while
the kernel booting, the serial port does
not send any messages. i have already rebuild the kernel with serial support
and the kernel command also added by
“console=ttyS0,115200".
any ideas ?
--
Wang Qing Pei
MSN:
Ticket
Owner
Status
Description
#164 ste...@coresystems.de new Building Coreboot v4 r/5554 fails mysteriously on Debian lenny and etch (x86)
#163 ste...@coresystems.de new Board still requires RAMBASE <1MB
#162 oxy
Qing Pei Wang wrote:
> hi all,
>jetway PA78VM5 have already can successfully load linux kernel, but
> while the kernel booting, the serial port does not send any messages.
Do you get messages from coreboot on the serial port?
//Peter
--
coreboot mailing list: coreboot@coreboot.org
http://w
There are some functions in the source code of coreboot version 4 which have
not defined any where like pci_get_dev(), What does it mean? Is Coreboot-V4 is
incomplete?
Is coreboot using some library functions of Linux distribution? I saw some
header files like , where are their definitions?
Hi Stefan,
I found some references to LinuxBios on the Trac roadmap page you might want
to change ?
http://tracker.coreboot.org/trac/coreboot/roadmap
Thanks,Nils.
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
I think you'll get a lot better responses if you try things and ask specific
questions when you have problems. Download the code. See how it compiles.
That will answer many of your questions.
> There are some functions in the source code of coreboot version 4 which
> have not defined any where
Hi all.
I experimented with K10+ CPUs and boards that doesn't support them, and
on some boards it's possible to start new CPUs with BIOS from board on
same (or closely relative, like GeForce7025/NForce520 pair) chipset -
possible with some bugs, possible without all working fuctions, or even
#24: Remove all files which have a GPL-incompatible license
--+-
Reporter: uwe| Owner: somebody
Type: defect | Status: closed
Priori
#48: Ready-made, downloadable QEMU images with various payloads
-+--
Reporter: uwe | Owner: uwe
Type: enhancement | Status: closed
Priority
#65: Unify SuperIO code?
--+-
Reporter: stepan | Owner: uwe
Type: enhancement| Status: closed
Priority: major | Milestone: Cosmetic
#95: Run coreboot in VirtualBox
--+-
Reporter: uwe| Owner: somebody
Type: enhancement| Status: closed
Priority: minor | Milestone:
C
#45: Enforce consistent coding style
--+-
Reporter: uwe| Owner: somebody
Type: enhancement| Status: closed
Priority: minor | Mileston
#8: Fully support all components of the ITE Super I/Os
--+-
Reporter: uwe| Owner: uwe
Type: defect | Status: closed
Priority: major |
#135: Flashrom deletes MAC addresses on Tyan Tomcat n3400B (S2925-E)
---+
Reporter: j...@… | Owner:
hailfinger
Type: defect
#135: Flashrom deletes MAC addresses on Tyan Tomcat n3400B (S2925-E)
--+-
Reporter: j...@… | Owner: ward
Type: defect | Status: new
Priority: major |
yeah, before kernel booting,
coreboot is fine. i can see the messages from coreboot
On Tue, Jun 29, 2010 at 1:58 AM, Peter Stuge wrote:
> Qing Pei Wang wrote:
> > hi all,
> >jetway PA78VM5 have already can successfully load linux kernel, but
> > while the kernel booting, the serial port does
On Tue, 29 Jun 2010, Qing Pei Wang wrote:
yeah, before kernel booting,
coreboot is fine. i can see the messages from coreboot
The kernel config has as option for "console over serial port."
Never tried it myself, but that night be it.
On Tue, Jun 29, 2010 at 1:58 AM, Peter Stuge wrote:
22 matches
Mail list logo