[coreboot] [commit] r6130 - trunk/src/southbridge/nvidia/mcp55

2010-11-28 Thread repository service
Author: stepan Date: Mon Nov 29 01:20:20 2010 New Revision: 6130 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6130 Log: fix typo Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer Modified: trunk/src/southbridge/nvidia/mcp55/mcp55_azalia.c Modified: trunk/src/southbridge

Re: [coreboot] [PATCH] ASUS P2B ACPI sleep preparations

2010-11-28 Thread Stefan Reinauer
On 11/28/10 12:47 PM, Idwer Vollering wrote: > 2010/11/28 Uwe Hermann mailto:u...@hermann-uwe.de>> > > On Sat, Nov 27, 2010 at 12:02:46PM +0100, Tobias Diedrich wrote: > > Add acpi_is_wakeup_early to i82371eb and P2B. > > Build fix for src/arch/i386/boot/acpi.c if !CONFIG_SMP > > Al

Re: [coreboot] [PATCH] ASUS P2B ACPI sleep preparations

2010-11-28 Thread Stefan Reinauer
On 11/28/10 12:36 PM, Uwe Hermann wrote: > On Sat, Nov 27, 2010 at 12:02:46PM +0100, Tobias Diedrich wrote: >> Add acpi_is_wakeup_early to i82371eb and P2B. >> Build fix for src/arch/i386/boot/acpi.c if !CONFIG_SMP >> Also check for acpi_slp_type 2 in acpi_is_wakeup, since S2 >> uses the same acpi

Re: [coreboot] [PATCH] ASUS P2B ACPI sleep preparations

2010-11-28 Thread Idwer Vollering
2010/11/28 Uwe Hermann > On Sat, Nov 27, 2010 at 12:02:46PM +0100, Tobias Diedrich wrote: > > Add acpi_is_wakeup_early to i82371eb and P2B. > > Build fix for src/arch/i386/boot/acpi.c if !CONFIG_SMP > > Also check for acpi_slp_type 2 in acpi_is_wakeup, since S2 > > uses the same acpi wakeup vecto

Re: [coreboot] [PATCH] ASUS P2B ACPI sleep preparations

2010-11-28 Thread Uwe Hermann
On Sat, Nov 27, 2010 at 12:02:46PM +0100, Tobias Diedrich wrote: > Add acpi_is_wakeup_early to i82371eb and P2B. > Build fix for src/arch/i386/boot/acpi.c if !CONFIG_SMP > Also check for acpi_slp_type 2 in acpi_is_wakeup, since S2 > uses the same acpi wakeup vector as S3. > Other chipsets so far on

Re: [coreboot] [commit] r6127 - in trunk/src: mainboard/asus/p2b northbridge/intel/i440bx/acpi southbridge/intel/i82371eb southbridge/intel/i82371eb/acpi

2010-11-28 Thread Uwe Hermann
On Sun, Nov 28, 2010 at 12:06:56PM +0100, Tobias Diedrich wrote: > BTW, my first idea was to use an acpi method that looks up pmbase in > the pci cfg space, but when I define a method like this: > > Method(TEST, 2) > { > Return (Add(Arg0, Arg1)) > } > > I g

[coreboot] #170: Need coreboot for ASUS P4PE_X/SE

2010-11-28 Thread coreboot
#170: Need coreboot for ASUS P4PE_X/SE --+--- Reporter: a...@… | Owner: ste...@… Type: defect |Status: new Priority: major | Milestone: Component: coreboot | Keywords: core

[coreboot] [commit] r6129 - in trunk/src/mainboard: asus/a8n_e gigabyte/m57sli jetway/pa78vm5 kontron/kt690 msi/ms7260 technexion/tim5690 technexion/tim8690

2010-11-28 Thread repository service
Author: uwe Date: Sun Nov 28 15:24:07 2010 New Revision: 6129 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6129 Log: devicetree.cb: Only add as many entries as there are DIMM slots. Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann Modified: trunk/src/mainboard/asus/a8n_e/device

Re: [coreboot] [commit] r6127 - in trunk/src: mainboard/asus/p2b northbridge/intel/i440bx/acpi southbridge/intel/i82371eb southbridge/intel/i82371eb/acpi

2010-11-28 Thread Tobias Diedrich
Tobias Diedrich wrote: > Stefan Reinauer wrote: > > The specified IO port is most likely wrong. As the comment mentions, the > > SSDT is a good place for that. A preprocessor define used both in the > > CPU init code and in the asl would solve the problem without an SSDT. > > For some info on CPU S

Re: [coreboot] [commit] r6127 - in trunk/src: mainboard/asus/p2b northbridge/intel/i440bx/acpi southbridge/intel/i82371eb southbridge/intel/i82371eb/acpi

2010-11-28 Thread Tobias Diedrich
Stefan Reinauer wrote: > On 11/27/10 1:40 AM, repository service wrote: > > +++ trunk/src/mainboard/asus/p2b/dsdt.asl Sat Nov 27 10:40:16 2010 > > (r6127) > > @@ -0,0 +1,101 @@ > ... > > +DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1) > > +{ > > + /* Define the main pr