Hi Juhana,
Is the problem possiable caused by ACPI tables?
Maybe you can remove HAVE_ACPI_TABLES from mainboard Kconfig file
and have a try.
On Mon, Nov 29, 2010 at 3:43 AM, Juhana Helovuo wrote:
> Hello all,
>
> I bought a new Asus M4A78-EM mainboard and started porting Coreboot to it.
> This b
Author: zbao
Date: Tue Nov 30 03:05:17 2010
New Revision: 6133
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6133
Log:
Trivial. Reindent and dos2unix.
Signed-off-by: Zheng Bao
Acked-by: Zheng Bao
Modified:
trunk/src/southbridge/amd/rs780/rs780_gfx.c
Modified: trunk/src/southbri
Tobias Diedrich wrote:
> Uwe Hermann wrote:
> > > While using the builtin Add() directly works:
> > >
> > > Signed-off-by: Tobias Diedrich
> >
> > ...this solution looks nice and readable too.
> >
> > Acked-by: Uwe Hermann
>
> Thanks, committed as r6132.
Maybe a bit too quick. I didn't test
Tobias Diedrich wrote:
> Uwe Hermann wrote:
> > > Index: coreboot-svn-p2b/src/arch/i386/boot/acpi.c
> > > ===
> > > --- coreboot-svn-p2b.orig/src/arch/i386/boot/acpi.c 2010-11-27
> > > 11:48:28.0 +0100
> > > +++ coreboot
Stefan Reinauer wrote:
> On 11/28/10 12:36 PM, Uwe Hermann wrote:
> > On Sat, Nov 27, 2010 at 12:02:46PM +0100, Tobias Diedrich wrote:
> >> Index: coreboot-svn-p2b/src/arch/i386/boot/acpi.c
> >> ===
> >> --- coreboot-svn-p2b.orig/src/a
Uwe Hermann wrote:
> > Index: coreboot-svn-p2b/src/arch/i386/boot/acpi.c
> > ===
> > --- coreboot-svn-p2b.orig/src/arch/i386/boot/acpi.c 2010-11-27
> > 11:48:28.0 +0100
> > +++ coreboot-svn-p2b/src/arch/i386/boot/acpi.c 2
Uwe Hermann wrote:
> > While using the builtin Add() directly works:
> >
> > Signed-off-by: Tobias Diedrich
>
> ...this solution looks nice and readable too.
>
> Acked-by: Uwe Hermann
Thanks, committed as r6132.
--
Tobias PGP: http://8ef7ddba.uguu.de
Author: ranma
Date: Mon Nov 29 21:40:33 2010
New Revision: 6132
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6132
Log:
Tobias Diedrich wrote:
> Stefan Reinauer wrote:
> > The specified IO port is most likely wrong. As the comment mentions, the
> > SSDT is a good place for that. A prep
Ticket
Owner
Status
Description
#170 ste...@coresystems.de new Need coreboot for ASUS P4PE_X/SE
#169 ste...@coresystems.de new ASUS P4PE-X/SE.
#168 ste...@coresystems.de new USBDEBUG might slow down coreboot
On Sun, 28 Nov 2010 01:19:18 +0100, Idwer Vollering
wrote:
> Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
> registers on ICH5.
> Add ICH5 and i865 to the supported chips list.
> Enable the dumping of BAR6 on i865.
>
> Signed-off-by: Idwer Vollering
>
> ---
>
Nice!
On Thu, Nov 04, 2010 at 12:46:16PM -0700, David Hendricks wrote:
> I am not certain what the difference is between the two chips, if any
> are discernible from superiotool's perspective. The F71889FG datasheet seems
> to be the public one -- the 0x23 and 0x07 chip IDs match the documented
> values.
Author: uwe
Date: Mon Nov 29 12:56:39 2010
New Revision: 6131
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6131
Log:
Add Fintek F71889 detection and dump support.
The patch was tested by a user on IRC who had the F71889FG. I
wrote it using documentation from Fintek's website availabl
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