[coreboot] [PATCH 6/6] Geode GX2 cleanup patch

Move VIDEO_MB to Kconfig. Signed-off-by: Nils Jacobs Thanks, Nils. Index: src/northbridge/amd/gx2/Kconfig === --- src/northbridge/amd/gx2/Kconfig (revision 6205) +++ src/northbridge/amd/gx2/Kconfig (working copy) @@ -21,6 +21,11 @@

[coreboot] [PATCH 5/6] Geode GX2 cleanup patch

Delete some unused code. Signed-off-by: Nils Jacobs Thanks, Nils. Index: src/cpu/amd/model_gx2/cpureginit.c === --- src/cpu/amd/model_gx2/cpureginit.c (revision 6205) +++ src/cpu/amd/model_gx2/cpureginit.c (working copy) @@ -4,8 +4,

[coreboot] [PATCH 4/6] Geode GX2 cleanup patch

Remove wrong GX2 processor IIOC mode setting on CS5535 southbridge code and fix CIS mode comments. Signed-off-by: Nils Jacobs Thanks, Nils. Index: src/southbridge/amd/cs5535/early_setup.c === --- src/southbridge/amd/cs5535/early_set

[coreboot] [PATCH 3/6] Geode GX2 cleanup patch

Add a "while (1)" function around the hlt instruction to assure the processor can't wake up from an interrupt. Signed-off-by: Nils Jacobs This was suggested by Uwe Hermann. Thanks! I also included the same patch for Geode LX. Nils. Index: src/northbridge/amd/gx2/pll_reset.c

[coreboot] [PATCH 2/6] Geode GX2 cleanup patch

Replace some MSR register numbers with names. Signed-off-by: Nils Jacobs Thanks, Nils. Index: src/include/cpu/amd/gx2def.h === --- src/include/cpu/amd/gx2def.h (revision 6205) +++ src/include/cpu/amd/gx2def.h (working copy) @@ -15,1

[coreboot] [PATCH 0/6] Geode GX2 cleanup patch

Hello all, I finally had a little time to work on further splitting up and updating my patches for Geode GX2. This patch set is ABUILD and boot tested on my Wyse S50. Thanks, Nils. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [PATCH 6/6] Geode GX2 cleanup patch

Sorry i pushed the wrong button. Disregard my last mail for now. Thanks, Nils. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [PATCH 6/6] Geode GX2 cleanup patch

Move VIDEO_MB to Kconfig. Signed-off-by: Nils Jacobs Thanks, Nils. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] question on disable_cache_as_ram() function.

Hi, This looks more like some memory related problem - when exiting the self refresh. Check if you find some errata which might cause this. Also check if DQS settings are stored / loaded correctly. Thanks, Rudolf -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman

[coreboot] FOSDEM Coreboot + flashrom stand acceptance

Hi all, We got the stand at FOSDEM. I would like to ask who will attend the FOSDEM? So far I know about: Me, Carl-Daniel, Peter Stuge. We would like to ask for the help with the stand. Thanks, Rudolf Původní zpráva Předmět: [FOSDEM] Coreboot + flashrom stand acceptance D

Re: [coreboot] question on disable_cache_as_ram() function.

On 12/21/10 8:04 PM, Russell Whitaker wrote: On Wed, 22 Dec 2010, Stefan Reinauer wrote: * Fengwei Zhang [101222 00:31]: backup_resume copies some memory into a safe place because it will be overwritten by copying coreboot to memory. After coreboot's device allocation is done, that memory wi