[coreboot] Patch to superiotool - add basic indexing of devices detected at IO ports

This patch adds a simple table of SuperIO chips already detected in the system. This allows superiotool to properly avoid scanning the same IO port again by another vendor-specific probe, after some device has already been found on that particular port. The table of chips detected contains entr

Re: [coreboot] Boot slows down on Tyan 1832DL (440BX)

Hi, This looks like the IRQ routing for PCI slots is incomplete/wrong. I think you need to fix it in PIR MPTable and in ACPI. Fix whatever tables you are using. Is this board in SVN already? Thanks, Rudolf -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listin

[coreboot] dmesg of a board which hangs at somewhere

I boot my board (Fam10/RS780/SB700) with coreboot. Sometimes it hangs at a place where it seems to a multi-core initialization. Before I debug this, could anyone give me a hint? Dmesg is below. Zheng coreboot-4.0-r964:968M Mon Jan 10 17:17:17 CST 2011 starting... BSP Family_Model: 00100f81 *s

[coreboot] [patch] AMD MCT DDR3 for register DIMMs

The code is tested on my board with register DIMMs. More tests need to be done. Please send the testing report. Note: The pDCTstat->PresetmaxFreq in mctGet_MaxLoadFreq() should be set to a higher limit, otherwise the frequnce will be set as 400MHz. Signed-off-by: Zheng Bao Index: src/northbridg

Re: [coreboot] [PATCH] SECC Pentium 2/3 users are gonna love this

I've applied the patch here and have been testing on a Tyan 1832DL using the Tyan 1846 mainboard and am not seeing any of the patch's printk output within the logs here. I have grepped for L2 & rdmsr. I can see where one of the patch files links in SLOT1 cpu with the 67x cpu. Can also see where

[coreboot] Serial port 2 fix for Epia-Mii

Serial port 2 won't work on Epia-Mii. Following patch I get it work. Found solution at Linuxbios archive : [LinuxBIOS] EPIA M COM2 problem + possible solution? --- coreboot/src/superio/via/vt1211/vt1211.c2011-01-09 16:05

[coreboot] superiotool Makefile patch

As requested in IRC, a small patch for superiotool's Makefile has been attached, for more details please take a look at the patch itself. -- Regards, Christian Ruppert Role: Gentoo Linux developer, Bugzilla administrator and Infrastructure member Fingerprint: EEB1 C341 7C84 B274 6C59 F243 5EAB 0

Re: [coreboot] Tyan 1832DL (440BX)

Looking at your northbridge dump, looks like you plugged in all the RAM you have for 1GB. I believe that only works on 440BX with ECC RAM and we still don't have code to support them. Could that be causing the failure? Three sticks for 768MB should work. Try that. -- coreboot mailing list: corebo

[coreboot] Tyan 1832DL (440BX)

Here's several logs detailing differences between warm & cold boot raminit. (With 4 slot SDRAM banks enabled within .config. using Tyan S1846 mainboard layout.) -- Roger http://rogerx.freeshell.org/ -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/corebo