Stefan Reinauer wrote:
>> +++ trunk/src/superio/smsc/lpc47n227/superio.c Sat Feb 19 15:51:31
>> 2011(r6373)
..
>> -lpc47n227_pnp_set_enable(dev, (dev->enabled) ? 1 : 0);
>> +lpc47n227_pnp_set_enable(dev, !!dev->enabled);
>
> How's this different?
This particular file did not
On 2/19/11 6:51 AM, repository service wrote:
Modified: trunk/src/superio/smsc/lpc47n227/superio.c
==
--- trunk/src/superio/smsc/lpc47n227/superio.c Thu Feb 17 21:48:45 2011
(r6372)
+++ trunk/src/superio/smsc/lpc
On 2/18/11 2:48 PM, Fengwei Zhang wrote:
Hi all,
I have a K8 board. I tried to change the DQS settings from a user
program, but I failed.
I printed out the DQS settings before my pci_write_long() function. I
also printed out the DQS settings after the pci writing. The results
are same.
My q
On 2/19/11 12:45 PM, xdrudis wrote:
On Fri, Feb 18, 2011 at 10:19:31AM -0500, Ward Vandewege wrote:
> Hi Xavi,
>
> On Wed, Feb 16, 2011 at 02:45:02PM +0100, Xavi Drudis Ferran wrote:
> > Should I send a patch making a Kconfig option to not upgrade microcode
for fam10? Is there any intere
Hi,
My HP Proliant dl145 g3 with Coreboot Bios and SeaBIOS payload cannot read
my hard disk. Here is the serial console output.
http://coreboot.pastebin.com/HYee3u0t
For easy reference, here is the coreboot page on the HP Proliant dl145 g3.
http://www.coreboot.org/HP_DL145_G3
To ensure the pro
Hi,
Coreboot with SeaBIOS as payload won't boot on my HP Proliant dl145 g3. This
server is listed as being supported. I followed the instructions at
http://www.coreboot.org/Build_HOWTO and used the version of SeaBIOS
automatically downloaded by coreboot for the payload. I'm using the most
recent s
Am 18.02.2011 14:04, schrieb Sven Schnelle:
> thanks for you reply. I've attached a new patch which addresses
> those issues.
Thanks
> For hardware that uses other addresses (like the ThinkPad X60) this means we
> get only one module running instead of both.
>
> This patch adds a second parameter
On Sun, Feb 20, 2011 at 12:23:32AM -0500, Keith Hui wrote:
> Raised debug level in SeaBIOS. Here is what's new from "Running option
> rom at c800:0003" in the old log:
>
> pmm call arg1=0
> pmm00: length=1000 handle=29400131 flags=1
> pmm_malloc zone=0x000f5770 handle=29400131 size=65536 align=10
On Sat, Feb 19, 2011 at 01:12:00AM -0500, Keith Hui wrote:
> I am trying (again) to get the Adaptec SCSI on my P2B-LS to initialize
> properly with coreboot. But it won't boot.
>
> Attached is a serial log of what happened.
>
> After compiling coreboot I checked out SeaBIOS through git and added
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