Author: oxygene
Date: Tue Mar 1 09:09:22 2011
New Revision: 6419
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6419
Log:
Fix double inclusion of toplevel Makefile.inc
Signed-off-by: Patrick Georgi
Acked-by: Patrick Georgi
Modified:
trunk/Makefile
Modified: trunk/Makefile
=
I created a new source code tree for only one motherboard, ASUS,
MEW_AM. There is no build/bootblock folder and CONFIG_TINY_BOOTBLOCK
and CONFIG_BOOTBLOCK_SIMPLE are not set. What is the difference
between tiny and big boot block?
My second question is that the code of bootblock is copied to romsta
On Mon, 28 Feb 2011 18:17:34 -0700, Marc Jones wrote:
> GSoC mentoring org signup starts this week and is due by March 11. I
> can take the lead this year, unless someone else would like to do it.
>
> If we are accepted (I expect we will be), Student applications are
> March 28 - April 8.
>
>
On 03/01/2011 07:20 AM, Keith Hui wrote:
> And here is the patch. abuild-tested. I will boot test it with P2B-LS
> and P3B-F tomorrow but I want this patch out there to generate some
> discussions and get more boot test coverage.
>
OK.
> This I believe falls under "infrastructure projects" [1].
>
Hi all,
After I add some memory initialisize code, the romstage is over 64K byte,and
tne code can't run properly.
Then what should I do when romstage is over 64K byte? Is romstage's size limits
to 64KB?
Thanks a lot!
2011-03-01
zxy__1127
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coreboot mailing list: coreboot@coreboot.org
htt
Hi List,
this patches are adding a new subsystemid option to sconfig. This option
can be used to specify subsystem IDs in devicetree.cb, and is intended to
replace the old Kconfig option.
Main motivation for this patch is the fact that the current Kconfig mechanism
only allows to set a Subsystem
Allow user to add 'subsystemid [inherit]' to devicetree.cb for
PCI and PCI domain devices.
Example:
device pci 00.0 on
subsystemid dead beef
end
If the user wants to have this ID inherited to all subdevices/functions,
he can add 'inherit', like in the following e
#175: Gift Baskets
+--
Reporter: ronnie.liloonline@… | Owner: stepan@…
Type: defect |Status: new
Priority: major| Milestone:
Component: coreboot
Hi List,
i fixed a few boards which missed the proper Kconfig/sconfig conversion.
Thanks to Peter Stuge for pointing that out. Also fix a few white space errors.
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coreboot mailing list: coreboot@coreboot.org
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Allow user to add 'subsystemid [inherit]' to devicetree.cb for
PCI and PCI domain devices.
Example:
device pci 00.0 on
subsystemid dead beef
end
If the user wants to have this ID inherited to all subdevices/functions,
he can add 'inherit', like in the following e
> Hi all,
>
> After I add some memory initialisize code, the romstage is over 64K byte,and
> tne code can't run properly.
> Then what should I do when romstage is over 64K byte? Is romstage's size
> limits to 64KB?
>
> Thanks a lot!
> 2011-03-01
>
It is not a direct limitation on romstage's size
Keith Hui wrote:
> Also, look at implementing TINY_BOOTBLOCK which leaves a tiny stub,
> well within the 64KB limit, which does nothing but enable enough
> hardware (southbridge to be exact) to make the entire rom visible,
> then locates and executes the real romstage which is now just another
> st
#176: Life Insurance - How To Buy Life Insurance Policies
-+-
Reporter: anonymous | Owner:
Type: enhancement | c-d.hailfinger.devel.2006@…
Priority: major |
#177: Life Insurance - How To Buy Life Insurance Policies
-+-
Reporter: anonymous | Owner:
Type: enhancement | c-d.hailfinger.devel.2006@…
Priority: major |
#178: Life Insurance - How To Buy Life Insurance Policies
-+-
Reporter: anonymous | Owner:
Type: enhancement | c-d.hailfinger.devel.2006@…
Priority: major |
Sven Schnelle wrote:
> Allow user to add 'subsystemid [inherit]' to devicetree.cb
> for
> PCI and PCI domain devices.
>
> Example:
>
> device pci 00.0 on
> subsystemid dead beef
> end
>
> If the user wants to have this ID inherited to all subdevices/functions,
> he ca
Sven Schnelle wrote:
> 158 files changed, 120 insertions(+), 561 deletions(-)
Signed-off-by and commit message is missing. But:
Acked-by: Peter Stuge
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Author: svens
Date: Tue Mar 1 20:58:15 2011
New Revision: 6420
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6420
Log:
Add subsystemid option to sconfig
Allow user to add 'subsystemid [inherit]' to devicetree.cb for
PCI and PCI domain devices.
Example:
device pci 00.0 on
Peter Stuge writes:
> Sven Schnelle wrote:
>> Allow user to add 'subsystemid [inherit]' to devicetree.cb
>> for
>> PCI and PCI domain devices.
>>
>> Example:
>>
>> device pci 00.0 on
>> subsystemid dead beef
>> end
>>
>> If the user wants to have this ID inherited to a
Peter Stuge writes:
> Sven Schnelle wrote:
>> 158 files changed, 120 insertions(+), 561 deletions(-)
>
> Signed-off-by and commit message is missing. But:
>
> Acked-by: Peter Stuge
r6421, thanks.
~sven
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Dear coreboot readers!
This is the automatic build system of coreboot.
The developer "svens" checked in revision 6421 to
the coreboot repository. This caused the following
changes:
Change Log:
Use subsystem id from devicetree.cb instead of Kconfig and move
all boards to the new config scheme.
* Alex G. [110226 02:35]:
> Index: src/include/console/post_codes.h
> ===
> --- src/include/console/post_codes.h (revision 0)
> +++ src/include/console/post_codes.h (revision 0)
> @@ -0,0 +1,350 @@
> +/*
> + * This file is part of t
* Peter Stuge [110216 14:43]:
> Alex G. wrote:
> > Extended K8T890 driver to include the K8T800 and K8M800 northbridges.
> > The K8T800 is almost identical to the K8T800Pro, also added to this
> > patch. The K8T800_OLD is also defined, which is an older version of
> > the K8T800, but which has n
* repository service [110301 20:58]:
> Author: svens
> Date: Tue Mar 1 20:58:15 2011
> New Revision: 6420
> URL: https://tracker.coreboot.org/trac/coreboot/changeset/6420
>
> Modified: trunk/src/include/device/device.h
> ===
Author: svens
Date: Tue Mar 1 22:43:57 2011
New Revision: 6422
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6422
Log:
Add lex output
lex.yy.c_shipped wasn't committed in r6420, which breaks the build
if you don't have the expert option checked that rebuilds those files.
Signed-off-
Author: svens
Date: Tue Mar 1 22:51:29 2011
New Revision: 6423
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6423
Log:
Fix a simple whitespace error in src/include/device/device.h
Signed-off-by: Sven Schnelle
Acked-by: Sven Schnelle
Reported-by: Stefan Reinauer
Modified:
trunk
Stefan Reinauer writes:
> * repository service [110301 20:58]:
>> Author: svens
>> Date: Tue Mar 1 20:58:15 2011
>> New Revision: 6420
>> URL: https://tracker.coreboot.org/trac/coreboot/changeset/6420
>>
>> Modified: trunk/src/include/device/device.h
>>
(Please keep me in CC, I'm not subscribed to the list)
After reading r6420.
Index: util/sconfig/main.c
===
--- util/sconfig/main.c (revision 6421)
+++ util/sconfig/main.c (working copy)
@@ -415,14 +415,13 @@
static void inherit_subs
(Please keep me in CC, I'm not subscribed to the list)
After reading r6421.
Index: src/mainboard/asus/m2v/devicetree.cb
===
--- src/mainboard/asus/m2v/devicetree.cb(revision 6421)
+++ src/mainboard/asus/m2v/devicetree.cb
(Please keep me in CC, I'm not subscribed to the list)
After reading r6420.
Signed-off-by: Sylvain "ythier" Hitier
Index: util/sconfig/main.c
===
--- util/sconfig/main.c (revision 6421)
+++ util/sconfig/main.c (working copy)
@@ -41
(Please keep me in CC, I'm not subscribed to the list)
After reading r6421.
Signed-off-by: Sylvain "ythier" Hitier
Index: src/mainboard/asus/m2v/devicetree.cb
===
--- src/mainboard/asus/m2v/devicetree.cb(revision 6421)
+++
Author: svens
Date: Tue Mar 1 22:57:11 2011
New Revision: 6424
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6424
Log:
[SCONFIG] remove unused variable in inherit_subsystem_ids()
i is a leftover from debugging, no longer needed. So just remove it.
Signed-off-by: Sylvain "ythier" Hit
Sylvain 'ythier' Hitier writes:
> (Please keep me in CC, I'm not subscribed to the list)
>
> After reading r6420.
>
> Signed-off-by: Sylvain "ythier" Hitier
>
> Index: util/sconfig/main.c
> ===
> --- util/sconfig/main.c (revis
Author: svens
Date: Tue Mar 1 23:02:37 2011
New Revision: 6425
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6425
Log:
Fix some subsystemid statements in r6421
Signed-off-by: Sylvain "ythier" Hitier
Acked-by: Sven Schnelle
Modified:
trunk/src/mainboard/asus/m2v/devicetree.cb
Sylvain 'ythier' Hitier writes:
> (Please keep me in CC, I'm not subscribed to the list)
>
> After reading r6421.
>
> Signed-off-by: Sylvain "ythier" Hitier
>
> Index: src/mainboard/asus/m2v/devicetree.cb
> ===
> --- src/mainboard/a
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer "svens" checked in revision 6422 to
the coreboot repository. This caused the following
changes:
Change Log:
Add lex output
lex.yy.c_shipped wasn't committed in r6420, which breaks the build
if you don't have t
On 03/01/2011 02:24 PM, coreboot wrote:
#178: Life Insurance - How To Buy Life Insurance Policies
-+-
Reporter: anonymous | Owner:
Type: enhancement | c-d.hailfinger.devel.2006@…
On 03/01/2011 04:14 PM, Stefan Reinauer wrote:
* Peter Stuge [110216 14:43]:
Alex G. wrote:
Extended K8T890 driver to include the K8T800 and K8M800 northbridges.
The K8T800 is almost identical to the K8T800Pro, also added to this
patch. The K8T800_OLD is also defined, which is an older versio
Auf 02.03.2011 00:40, Joseph Smith schrieb:
> On 03/01/2011 04:14 PM, Stefan Reinauer wrote:
>> * Peter Stuge [110216 14:43]:
>>> Alex G. wrote:
Extended K8T890 driver to include the K8T800 and K8M800 northbridges.
The K8T800 is almost identical to the K8T800Pro, also added to this
* Carl-Daniel Hailfinger [110302 01:05]:
> Auf 02.03.2011 00:40, Joseph Smith schrieb:
> > On 03/01/2011 04:14 PM, Stefan Reinauer wrote:
> >> * Peter Stuge [110216 14:43]:
> >>> Alex G. wrote:
> Extended K8T890 driver to include the K8T800 and K8M800 northbridges.
> The K8T800 is almos
Thanks to Peter Stuge for his hint, we are moderating Trac posts now for
all anonymous posts so this should no longer be an issue.
* Joseph Smith [110302 00:39]:
> On 03/01/2011 02:24 PM, coreboot wrote:
> >#178: Life Insurance - How To Buy Life Insurance Policies
> >-
* ali hagigat [110301 09:58]:
> What is the difference between tiny and big boot block?
In big boot block mode, romstage (and thus ram init) is part of the
boot block. In tiny boot block mode, romstage is an extra file in CBFS.
> My second question is that the code of bootblock is copied to roms
* Joseph Smith [110301 10:08]:
> On Mon, 28 Feb 2011 18:17:34 -0700, Marc Jones wrote:
> > GSoC mentoring org signup starts this week and is due by March 11. I
> > can take the lead this year, unless someone else would like to do it.
> >
> > If we are accepted (I expect we will be), Student appl
* Anders Jenbo [110301 07:27]:
> Wondered if you guys have seen this:
>
> http://www.h-online.com/open/news/item/Intel-releases-GRUB-based-BIOS-test-suite-1197828.html
Did anyone work on getting this to work on coreboot?
Stefan
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发件人： Keith Hui
发送时间： 2011-03-02 00:32:50
收件人： coreboot@coreboot.org
抄送：
主题： Re: [coreboot] how to deal with large romstage size?
> Hi all,
>
> After I add some memory initialisize code, the romstage is over 64K byte,and
> tne code can't run properly.
> Then what should I do when romstage i
---
First, Mysterious breakage on experimental i82371eb ACPI stuff
Rudolf, Idwer, and anyone that tried doing ACPI for the ASUS P2B
series of boards:
I'm seeing mysterious compiler breakge after updating my local copy to
r6424. I copied that from P2B to P2B-LS and both break. Make log says:
Arrandale and QM57... very nice recent hardware.
You are going to need to 1) make TINY_BOOTBLOCK work, 2) make sure
QM57 can map the entire ROM, 3) make CAR work on Arrandale, IIRC
coreboot still has no support for anything in the Intel Core family of
CPUs.
Good luck.
> 主题： Re: [coreboot] how to
Keith Hui wrote:
> You are going to need to 1) make TINY_BOOTBLOCK work, 2) make sure
> QM57 can map the entire ROM, 3) make CAR work on Arrandale,
This is a good stragey. Serialport is also important. When serialport
is working, SerialICE can reveal many required details.
> IIRC coreboot still
Arrandale and QM57... very nice recent hardware.
You are going to need to 1) make TINY_BOOTBLOCK work, 2) make sure
QM57 can map the entire ROM, 3) make CAR work on Arrandale, IIRC
coreboot still has no support for anything in the Intel Core family of
CPUs.
Good luck.
1) make TINY_BOOTBLOCK wor
Auf 02.03.2011 01:08, Stefan Reinauer schrieb:
> * Carl-Daniel Hailfinger [110302 01:05]:
>
>> Auf 02.03.2011 00:40, Joseph Smith schrieb:
>>
>>> On 03/01/2011 04:14 PM, Stefan Reinauer wrote:
>>>
* Peter Stuge [110216 14:43]:
> Alex G. wrote:
>
On 3/1/11 11:05 PM, Carl-Daniel Hailfinger wrote:
Auf 02.03.2011 01:08, Stefan Reinauer schrieb:
* Carl-Daniel Hailfinger [110302 01:05]:
Auf 02.03.2011 00:40, Joseph Smith schrieb:
On 03/01/2011 04:14 PM, Stefan Reinauer wrote:
* Peter Stuge [110216 14:43]:
Alex G. wrote:
Extended
On 3/1/11 8:30 PM, Keith Hui wrote:
---
First, Mysterious breakage on experimental i82371eb ACPI stuff
Rudolf, Idwer, and anyone that tried doing ACPI for the ASUS P2B
series of boards:
I'm seeing mysterious compiler breakge after updating my local copy to
r6424. I copied that from P2B to P2B-L
On 3/1/11 5:47 PM, zxy__1127 wrote:
> *发 件人：* Keith Hui
> *发 送时间：* 2011-03-02 00:32:50
> *收 件人：* coreboot@coreboot.org
> *抄 送：*
> *主 题：* Re: [coreboot] how to deal with large romstage size?
> > Hi all,
> >
> > After I add some memory initialisize code, the romstage is over 64K
> byte,and tne code c
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