Hi,
I think you need to make the complete flash visible in a southbridge bootblock.c
It would help if you could publish your current code so we can do better than
asking the crystal ball for answers ;)
it's based on D945gclf, but MRC is under NDA, :-(
Thanks!
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On 03/01/2011 11:14 PM, Stefan Reinauer wrote:
* Peter Stuge pe...@stuge.se [110216 14:43]:
Alex G. wrote:
Extended K8T890 driver to include the K8T800 and K8M800 northbridges.
The K8T800 is almost identical to the K8T800Pro, also added to this
patch. The K8T800_OLD is also defined, which is
On 03/01/2011 11:09 PM, Stefan Reinauer wrote:
* Alex G. mr.nuke...@gmail.com [110226 02:35]:
Index: src/include/console/post_codes.h
===
--- src/include/console/post_codes.h (revision 0)
+++ src/include/console/post_codes.h
On 03/02/2011 02:08 AM, Stefan Reinauer wrote:
* Carl-Daniel Hailfinger c-d.hailfinger.devel.2...@gmx.net [110302 01:05]:
Auf 02.03.2011 00:40, Joseph Smith schrieb:
On 03/01/2011 04:14 PM, Stefan Reinauer wrote:
* Peter Stugepe...@stuge.se [110216 14:43]:
Alex G. wrote:
Extended K8T890
On 03/02/2011 10:55 AM, Alex G. wrote:
On 03/01/2011 11:09 PM, Stefan Reinauer wrote:
Due to the GPLv2 only nature of many source code files, we can not allow
GPLv3 or even GPLv3 or later code to be committed to the repository.
Please make this GPLv2 if possible.
You may, if you wish, change
I think i made a mistake. In big boot block, bootblock code is written
once for coreboot.pre and the same is for tiny boot block. My source
of confusion was the inclusion of the bootblock code in crt0.
Regards
On Wed, Mar 2, 2011 at 3:47 AM, Stefan Reinauer
stefan.reina...@coreboot.org wrote:
*
Signed-off-by: Sven Schnelle sv...@stackframe.org
---
src/superio/nsc/Kconfig |2 +
src/superio/nsc/Makefile.inc |1 +
src/superio/nsc/pc87384/Makefile.inc | 22 +
src/superio/nsc/pc87384/chip.h | 31 +
src/superio/nsc/pc87384/pc87384.h
Hi,
I think you need to make the complete flash visible in a southbridge
bootblock.c
It would help if you could publish your current code so we can do better
than asking the crystal ball for answers ;)
it's based on D945gclf, but MRC is under NDA, :-(
Thanks!
It's the Memory
How to use the coreboot-5917 software??--
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Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
---
Index: src/southbridge/via/vt8231/early_serial.c
===
--- src/southbridge/via/vt8231/early_serial.c (revision 6380)
+++ src/southbridge/via/vt8231/early_serial.c (working copy)
Quoting Anders Jenbo and...@jenbo.dk:
Hi here is the code i did for the via apollo pro 133(a), i also
included the code for the board that i was working on so you have
some sample code to work with.
I was working on the SMB code when i last left it so it isn't able
to detect the ram yet,
Author: stuge
Date: Wed Mar 2 20:56:28 2011
New Revision: 6426
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6426
Log:
Fixes licensing of src/southbridge/via/k8t890/k8x8xx.h to GPLv2+ from GPLv3.
Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
Acked-by: Peter Stuge
Alex G. wrote:
Sure. Patches welcome.
Actually, if I messed it up, I find it fair that I fix it.
Not only is it the only fair way, it's also the simplest way. I'm
sorry people were so trigger happy with this.
Sorry I couldn't get to it earlier.
No problem.
Fixes licensing of
On 02/24/2011 04:12 PM, Alex G. wrote:
Ping!
Ping6 ?
Alex
Add support for ASUS K8X-X SE motherboard.
The good:
SeaBIOS can start, run option roms, and boot off DVD, IDE, or CBFS.
IRQ tables are fairly refined.
MP-Table is complete and reflects actual hardware setup.
The bad:
ACPI tables are
Hi Patrick,
Author: oxygene
Date: Tue Mar 1 08:30:14 2011
New Revision: 6418
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6418
Log:
Mark non-returning function as noreturn to help some compiler versions
Signed-off-by: Patrick Georgi patrick.georgi at secunet.com
Acked-by: Patrick
Option C with GPLv2+ licensing.
Alex
Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
Index: src/include/superio/early_serial.h
===
--- src/include/superio/early_serial.h (revision 0)
+++ src/include/superio/early_serial.h
Am 02.03.2011 21:13, schrieb Nils:
-static void hcf(void)
+static void __attribute__((noreturn)) hcf(void)
Should this change also be applied for the almost same function in Geode GX2?
As long as it doesn't return, yes.
Patrick
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On 03/02/2011 12:03 PM, Andy wrote:
How to use the coreboot-5917 software??
$ svn co svn://coreboot.org/coreboot/trunk coreboot -r 5917
--
Thanks,
Joseph Smith
Set-Top-Linux
www.settoplinux.org
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ping3?
On Mon, Jan 31, 2011 at 12:53 PM, Keith Hui buu...@gmail.com wrote:
On Fri, Jan 14, 2011 at 3:47 AM, Roger rogerx@gmail.com wrote:
On Tue, Jan 11, 2011 at 11:17:17PM -0500, Keith Hui wrote:
Hi all,
Here is the new L2 cache patch. Sign-off in the patch itself. Still
very juicy and
Alex G. wrote:
Add support for ASUS K8X-X SE motherboard.
..
Linux cannot complete booting.
Also not with acpi=off so that it uses the mptable?
Basically the code isn't ready yet.
Maybe we should have a CONFIG_EXPERIMENTAL ?
//Peter
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On 03/02/2011 04:38 PM, Peter Stuge wrote:
Alex G. wrote:
Add support for ASUS K8X-X SE motherboard.
..
Linux cannot complete booting.
Also not with acpi=off so that it uses the mptable?
Basically the code isn't ready yet.
Maybe we should have a CONFIG_EXPERIMENTAL ?
//Peter
Alex why
On 03/02/2011 11:41 PM, Joseph Smith wrote:
On 03/02/2011 04:38 PM, Peter Stuge wrote:
Alex G. wrote:
Add support for ASUS K8X-X SE motherboard.
..
Linux cannot complete booting.
Also not with acpi=off so that it uses the mptable?
Yes. It fails to work with acpi, mptable, and pirq table.
Hello jankeso,
in the process of writing a board enable procedure for your mainboard I
stumbled upon the fact that the chip used to control the write enable
line is most likely your Super I/O chip, which is a NSC PC87364.
superiotool currently does not support dumping that chip, so I can not
Option C with GPLv2+ licensing.
A few quick things:
SUPERIO_FINTEK_F81865F_HAS_EARLY_SERIAL seems long-winded for a name.
I prefer to define CONFIG_SUPERIO_HAS_EARLY_SERIAL (or even just
CONFIG_HAS_EARLY_SERIAL) within the superio Kconfig and not in
mainboard Kconfig. This I think would be a
On 03/03/2011 01:01 AM, Keith Hui wrote:
Option C with GPLv2+ licensing.
A few quick things:
SUPERIO_FINTEK_F81865F_HAS_EARLY_SERIAL seems long-winded for a name.
I prefer to define CONFIG_SUPERIO_HAS_EARLY_SERIAL (or even just
CONFIG_HAS_EARLY_SERIAL) within the superio Kconfig and not
On 03/02/2011 05:03 PM, Alex G. wrote:
On 03/02/2011 11:41 PM, Joseph Smith wrote:
On 03/02/2011 04:38 PM, Peter Stuge wrote:
Alex G. wrote:
Add support for ASUS K8X-X SE motherboard.
..
Linux cannot complete booting.
Also not with acpi=off so that it uses the mptable?
Yes. It fails to
Sven Schnelle wrote:
Signed-off-by: Sven Schnelle sv...@stackframe.org
Acked-by: Peter Stuge pe...@stuge.se
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Am Donnerstag, den 03.03.2011, 01:06 +0200 schrieb Alex G.:
So you have:
select SUPERIO_KEITH875H
select SUPERIO_ALEX666G
select SUPERIO_ALEX666G_HAS_EARLY_SERIAL
Having said that though, isn't early serial support sort of mandatory
anyway?
The point is not to
On Wed, 2 Mar 2011 16:26:26 +0800, zxy__1127 zxy__1...@163.com wrote:
it's based on D945gclf, but MRC is under NDA, :-(
Just to prevent any surprises: coreboot is licensed under the terms of the
GPL (version 2).
It won't be easy to develop a product that is distributable under both the
terms of
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