[coreboot] Patch merged into coreboot/master: 9f88de6 fix compilation of intel/sch northbridge code with gcc 4.6

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 9f88de6eea53205fac34158c9c71f258a159a364 Author: Stefan Reinauer Date: Thu Oct 13 16:53:11 2011 -0700 fix compilation of intel/sch northbridge code with gcc 4.6 Change-Id: I57804dff9e37f0127900ebb7a67118382944eb89 Sign

[coreboot] Patch merged into coreboot/master: 06fb731 Add eh_frame to rom section to fix compilation of coreboot with gcc 4.6

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 06fb7317666ca52a7d88292c2a6d890005488e91 Author: Stefan Reinauer Date: Thu Oct 13 16:52:27 2011 -0700 Add eh_frame to rom section to fix compilation of coreboot with gcc 4.6 Change-Id: I347dd84a61244eed145c02a080309d5a34c5

Re: [coreboot] how to delete symbol link created at compile time

2011-10-13 Thread She, Kerry
Hello, Marc > -Original Message- > From: Marc Jones [mailto:marcj...@gmail.com] > Sent: Friday, October 14, 2011 12:22 PM > To: She, Kerry > Cc: coreboot > Subject: Re: [coreboot] how to delete symbol link created at compile time > > On Thu, Oct 13, 2011 at 3:19 AM, She, Kerry wrote: > >

Re: [coreboot] [SeaBIOS] usb boot issue

2011-10-13 Thread She, Kerry
> -Original Message- > From: seabios-bounces+kerry.she=amd@seabios.org [mailto:seabios- > bounces+kerry.she=amd@seabios.org] On Behalf Of Kevin O'Connor > Sent: Friday, October 14, 2011 7:15 AM > To: Wolfgang Kamp - datakamp > Cc: seab...@seabios.org; coreboot@coreboot.org > Subje

Re: [coreboot] how to delete symbol link created at compile time

2011-10-13 Thread Marc Jones
On Thu, Oct 13, 2011 at 3:19 AM, She, Kerry wrote: > Hello, > > > > Some mainboard support more than one family of CPUs with same socket type, > > Such as SuperMicro/h8scm: > > http://www.supermicro.com/Aplus/motherboard/Opteron4100/SR56x0/H8SCM-F.cfm > > > > My implementation is the mainboard CPU

Re: [coreboot] [SeaBIOS] usb boot issue

2011-10-13 Thread Scott Duplichan
Kevin O'Connor wrote: ]On Thu, Oct 13, 2011 at 03:56:48PM +0200, Wolfgang Kamp - datakamp wrote: ]> ]> Hi, ]> ]> is there any solution for the usb boot issue of the AMD SB800 Persimmon ]platform ]> with SeaBIOS 1.6.3 and actual Coreboot version? ] ]I'm unfamiliar with the issue. Can you post th

Re: [coreboot] [SeaBIOS] usb boot issue

2011-10-13 Thread Kevin O'Connor
On Thu, Oct 13, 2011 at 03:56:48PM +0200, Wolfgang Kamp - datakamp wrote: > > Hi, > > is there any solution for the usb boot issue of the AMD SB800 Persimmon > platform > with SeaBIOS 1.6.3 and actual Coreboot version? I'm unfamiliar with the issue. Can you post the SeaBIOS debug output along

[coreboot] New patch to review for coreboot: 4876404 AMD CPU and chipset fixes for compilation with gcc 4.6

2011-10-13 Thread stefan.reina...@coreboot.org
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/266 -gerrit commit 48764047d8720e3e6f9ae9119f8ae16b9d875cd7 Author: Stefan Reinauer Date: Thu Oct 13 17:04:02 2011 -0700 AMD CPU and chipset fixes for

[coreboot] New patch to review for coreboot: 634373f Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6

2011-10-13 Thread stefan.reina...@coreboot.org
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/268 -gerrit commit 634373f4296d80fb0cb6f7df669351f83788d4ee Author: Stefan Reinauer Date: Thu Oct 13 17:26:43 2011 -0700 Fix AMD SB800 (cimx) southbrid

[coreboot] New patch to review for coreboot: 8b99e13 Fix compilation of AMD GX2 northbridge code with gcc 4.6

2011-10-13 Thread stefan.reina...@coreboot.org
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/267 -gerrit commit 8b99e131dab9680feb84d4a1e126b58ea12aa8d0 Author: Stefan Reinauer Date: Thu Oct 13 17:26:10 2011 -0700 Fix compilation of AMD GX2 nor

[coreboot] New patch to review for coreboot: 59f4c2c Fix compilation of VIA CN700 northbridge code with gcc 4.6

2011-10-13 Thread stefan.reina...@coreboot.org
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/265 -gerrit commit 59f4c2c0d334d96a6045ba12782c318cbda01997 Author: Stefan Reinauer Date: Thu Oct 13 17:03:04 2011 -0700 Fix compilation of VIA CN700 n

[coreboot] New patch to review for coreboot: 9f88de6 fix compilation of intel/sch northbridge code with gcc 4.6

2011-10-13 Thread stefan.reina...@coreboot.org
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/264 -gerrit commit 9f88de6eea53205fac34158c9c71f258a159a364 Author: Stefan Reinauer Date: Thu Oct 13 16:53:11 2011 -0700 fix compilation of intel/sch n

[coreboot] New patch to review for coreboot: 06fb731 Add eh_frame to rom section to fix compilation of coreboot with gcc 4.6

2011-10-13 Thread stefan.reina...@coreboot.org
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/263 -gerrit commit 06fb7317666ca52a7d88292c2a6d890005488e91 Author: Stefan Reinauer Date: Thu Oct 13 16:52:27 2011 -0700 Add eh_frame to rom section to

[coreboot] Gerrit config (was: Re: Patch merged into coreboot/master: 7f8e685 Load an IDT with NULL limit)

2011-10-13 Thread Uwe Hermann
On Thu, Oct 13, 2011 at 08:04:27PM +0200, ger...@coreboot.org wrote: > the following patch was just integrated into master: > commit 7f8e685996f65f2c67d1113fcfaab33ccc385da7 > Author: Stefan Reinauer > Date: Wed Jun 1 14:01:46 2011 -0700 > > Load an IDT with NULL limit > > Load an

[coreboot] Patch merged into coreboot/master: b296563 refactor vesa mode setting code and bootsplash code

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit b296563878a245bc138fb213f1fb60e04ae1751a Author: Stefan Reinauer Date: Wed Oct 12 14:30:59 2011 -0700 refactor vesa mode setting code and bootsplash code - adds possibility to set a vesa mode without showing a bootsplash

[coreboot] Patch merged into coreboot/master: 38860f7 Refactor option rom initialization code in coreboot.

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 38860f7f936d58ca777a55dfc3c458feccfc0137 Author: Stefan Reinauer Date: Wed Oct 12 14:25:07 2011 -0700 Refactor option rom initialization code in coreboot. - move int15 handler out of the generic code into the mainboard dir

[coreboot] Patch merged into coreboot/master: 9570367 Prevent build breakage without consoles enabled

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 957036708c6ce1396fc1ebbf33e3e3a01af09bc7 Author: Stefan Reinauer Date: Wed Jun 1 14:04:50 2011 -0700 Prevent build breakage without consoles enabled If all console types are disabled, coreboot will fail to compile because

[coreboot] Patch merged into coreboot/master: 7f8e685 Load an IDT with NULL limit

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 7f8e685996f65f2c67d1113fcfaab33ccc385da7 Author: Stefan Reinauer Date: Wed Jun 1 14:01:46 2011 -0700 Load an IDT with NULL limit Load an IDT with NULL limit to prevent the 16bit IDT being used in protected mode before

[coreboot] Patch merged into coreboot/master: b043841 Fix compilation of x86emu with gcc 4.6.x

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit b0438411e379d3fa1e3e7f43963138eb2d46a2fd Author: Stefan Reinauer Date: Tue Oct 4 10:34:37 2011 -0700 Fix compilation of x86emu with gcc 4.6.x gcc 4.6 complains about unused but set variables in x86emu. Particularly som

[coreboot] Patch merged into coreboot/master: 6faf97c Fix native x86 option rom initialization

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 6faf97c0c1a10c44fbfebcd25d8b93967263fdfd Author: Stefan Reinauer Date: Wed Oct 12 14:35:54 2011 -0700 Fix native x86 option rom initialization - Intel option roms want an initialized i8259 or they will throw an excep

[coreboot] Patch merged into coreboot/master: b49e5b5 Enable/fix compilation of i8254 code in ram stage.

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit b49e5b5bb66a9194728471ed7c04badf5897fb46 Author: Stefan Reinauer Date: Tue Sep 27 16:26:05 2011 -0700 Enable/fix compilation of i8254 code in ram stage. Change-Id: I3bbe795d8e6e576be9e94d6cd888e78a116ddbbd Signed-off-b

[coreboot] Patch merged into coreboot/master: 7c934a0 Update "STABLE" SeaBIOS selection to release 1.6.3

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 7c934a0665195ffb523cdc05366492e7acfb0ff0 Author: Stefan Reinauer Date: Wed Oct 12 14:05:49 2011 -0700 Update "STABLE" SeaBIOS selection to release 1.6.3 1.6.3 has a lot of benefits over the previous version, the two mo

[coreboot] Patch merged into coreboot/master: 2a52406 Use default table creator macro for all SSDTs

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 2a5240633d7e9b768f959b24afb2ab199ed2632f Author: Stefan Reinauer Date: Thu Oct 13 01:18:29 2011 +0200 Use default table creator macro for all SSDTs Change-Id: I0c138ebfdc6d4d5ae7d3512b0dd68df20485690e Signed-off-by: St

[coreboot] usb boot issue

2011-10-13 Thread Wolfgang Kamp - datakamp
Hi, is there any solution for the usb boot issue of the AMD SB800 Persimmon platform with SeaBIOS 1.6.3 and actual Coreboot version? Wolfgang Email: wmk...@datakamp.de -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Patch merged into coreboot/master: b130550 Fix romstage creation with gcc 4.6 and CAR targets

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit b1305505c57e4a4c34cf7f11b7028bf52dc8fd2a Author: Stefan Reinauer Date: Wed Oct 12 12:54:08 2011 -0700 Fix romstage creation with gcc 4.6 and CAR targets newer gcc versions generate ".section .text" instead of just ".text"

[coreboot] Patch merged into coreboot/master: 5bcd9a7 siemens/sitemp_g1p1: Don't mess with virtual wire settings

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 5bcd9a7d036de9942eddbe0dde3b5bf939a0bc95 Author: Patrick Georgi Date: Thu Oct 6 15:24:08 2011 +0200 siemens/sitemp_g1p1: Don't mess with virtual wire settings That function broke SMP on Linux 2.4, now it works. Ch

[coreboot] how to delete symbol link created at compile time

2011-10-13 Thread She, Kerry
Hello, Some mainboard support more than one family of CPUs with same socket type, Such as SuperMicro/h8scm: http://www.supermicro.com/Aplus/motherboard/Opteron4100/SR56x0/H8SCM-F.c fm My implementation is the mainboard CPU type can be configured as family10 or family15 CPU. In order to e

[coreboot] Patch merged into coreboot/master: 160ab12 siemens/sitemp_g1p1: Get rid of bus_isa and bus_type

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 160ab128f8ea5ca700a4f8ec868e2bbeadbb09b5 Author: Patrick Georgi Date: Thu Oct 6 14:34:22 2011 +0200 siemens/sitemp_g1p1: Get rid of bus_isa and bus_type Each variable is essentially unused or incorrect. Change-Id:

[coreboot] Patch merged into coreboot/master: 762b7b6 amd/sb600: Enable COM2 at all times in early setup

2011-10-13 Thread gerrit
the following patch was just integrated into master: commit 762b7b6c00cdee44eebdd7a8ffeea38404c903a6 Author: Patrick Georgi Date: Fri Oct 7 14:43:27 2011 +0200 amd/sb600: Enable COM2 at all times in early setup Otherwise with a coreboot log on COM2 (which doesn't work) the boot

Re: [coreboot] missing read resources

2011-10-13 Thread Myles Watson
On Thu, Oct 13, 2011 at 1:47 AM, Stefan Reinauer wrote: > * Myles Watson [111012 08:19]: >> On Tue, Oct 11, 2011 at 10:13 PM, Oskar Enoksson wrote: >> > I get the following warnings: >> > >> > APIC: 00 missing read_resources >> > APIC: 01 missing read_resources >> > APIC: 02 missing read_resourc

[coreboot] Patch set updated for coreboot: 762b7b6 amd/sb600: Enable COM2 at all times in early setup

2011-10-13 Thread patr...@georgi-clan.de
Patrick Georgi (patr...@georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/241 -gerrit commit 762b7b6c00cdee44eebdd7a8ffeea38404c903a6 Author: Patrick Georgi Date: Fri Oct 7 14:43:27 2011 +0200 amd/sb600: Enable COM2 at all times in

[coreboot] Patch set updated for coreboot: 5bcd9a7 siemens/sitemp_g1p1: Don't mess with virtual wire settings

2011-10-13 Thread patr...@georgi-clan.de
Patrick Georgi (patr...@georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/243 -gerrit commit 5bcd9a7d036de9942eddbe0dde3b5bf939a0bc95 Author: Patrick Georgi Date: Thu Oct 6 15:24:08 2011 +0200 siemens/sitemp_g1p1: Don't mess with vi

[coreboot] Patch set updated for coreboot: 160ab12 siemens/sitemp_g1p1: Get rid of bus_isa and bus_type

2011-10-13 Thread patr...@georgi-clan.de
Patrick Georgi (patr...@georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/242 -gerrit commit 160ab128f8ea5ca700a4f8ec868e2bbeadbb09b5 Author: Patrick Georgi Date: Thu Oct 6 14:34:22 2011 +0200 siemens/sitemp_g1p1: Get rid of bus_isa