Hi, Martin,
Are you test on persimmon or other board which is quite close it?
I guess, just guess, have you checked the input clkin in F81865? It has two
options, 48MHz or 24MHz.
You should set in superio register based on the actual input clock freq.
Zheng (Joe)
> -Original Message-
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1046
-gerrit
commit c73f81ecfd6058eaccaf50086298850fefbf5d9d
Author: Stefan Reinauer
Date: Wed May 23 11:21:10 2012 -0700
Sandybridge: Fix MRC cache ca
Hello ldwer,
>>Are you using a payload? If so, which one are you using?
I use SeaBIOS stable version.
>Have you checked if there is output on the target's EHCI/serial port,
>and what the output is?
>See http://www.coreboot.org/Developer_Manual/Tools#Null-modem_cable
>and http://www.coreboot.org/E
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1052
-gerrit
commit 2f5cfccdbbf588e1a6243080d357cc73cc20fb88
Author: Stefan Reinauer
Date: Wed May 23 14:20:18 2012 -0700
ChromeOS: Remove remnants of
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1051
-gerrit
commit 941d3ed66a17dc667ade5cc5bfaeee3207d0
Author: Stefan Reinauer
Date: Wed May 23 14:16:47 2012 -0700
Sandybridge: Remove remnants
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1050
-gerrit
commit 4ca567ab4053c32aae87bd3cfd0a6e500d3dddb8
Author: Vadim Bendebury
Date: Thu May 17 17:21:27 2012 -0700
Fix full reset for Ivy Bridge
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1049
-gerrit
commit 61899d3c0595c73c0e2502a5af2215682dc28144
Author: Vadim Bendebury
Date: Tue May 15 14:18:59 2012 -0700
Provide functions to access a
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1048
-gerrit
commit 5434dcce2c63e3a0cec44ab26da170a1be02b8b4
Author: Stefan Reinauer
Date: Wed May 23 11:18:35 2012 -0700
Add support for Panther Point
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1047
-gerrit
commit 58ba49e59fd98b84a1267dd1308250e2e0ddcd11
Author: Stefan Reinauer
Date: Fri May 11 16:30:54 2012 -0700
Drop config variable CPU_MODE
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1045
-gerrit
commit 6bf01cb29d9a59090affae34724b3220fd19d8cb
Author: Stefan Reinauer
Date: Wed May 23 11:03:29 2012 -0700
Reduce default verbosity of S
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1044
-gerrit
commit 3a356617fd684e65e968f5737ec258cbec54da9e
Author: Stefan Reinauer
Date: Tue May 22 15:24:51 2012 -0700
Fix compilation with CONFIG_D
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1043
-gerrit
commit 0a0261a3840f353ae35d752fadf537d72631149e
Author: Stefan Reinauer
Date: Tue May 15 13:28:07 2012 -0700
Implement %zu / %zd in printk
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1042
-gerrit
commit c7e6509905d5cb11ac611db29c55e19c12cccbda
Author: Stefan Reinauer
Date: Tue May 15 12:36:57 2012 -0700
Move subsystem IDs to devicet
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1041
-gerrit
commit 194a9c36f9a812241baa02a854ba8195f37f7912
Author: Stefan Reinauer
Date: Mon May 14 13:52:32 2012 -0700
Fix printk types in SPI flash
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1040
-gerrit
commit 7a0cac14ac8891d927978c9c6f9cc22d1f406d4d
Author: Stefan Reinauer
Date: Mon May 14 13:21:08 2012 -0700
Fix size_t for certain versio
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1039
-gerrit
commit a5a290269a4f478d2cc40cb40167286262e23cd4
Author: Stefan Reinauer
Date: Fri May 11 15:53:43 2012 -0700
Add EM100 mode to Intel Firmw
Stefan Reinauer (stefan.reina...@coreboot.org) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1038
-gerrit
commit c369ce65cc2d889cc8042656f45a38a373b531b7
Author: Stefan Reinauer
Date: Fri May 11 12:58:11 2012 -0700
chromeos: Fix compilation of
2012/5/23 :
> Hello all,
>
>
>
> I check out coreboot and build and run persimmon project via menuconfig,
Are you using a payload? If so, which one are you using?
>
> Mainborad: AMD
>
> Mainboard Model: Persimon
>
> FlashSize: 4MB
>
>
>
> But it always show 0x00 on my PCI debug card.
Have you c
Hello all,
I check out coreboot and build and run persimmon project via menuconfig,
Mainborad: AMD
Mainboard Model: Persimon
FlashSize: 4MB
But it always show 0x00 on my PCI debug card.
I do not know its 80 port default path is LPC or PCI, so
I have tried to route 80 port to PCI in en
From: Manasa GV
This patch is to file x7db8.Build(Jenkins) results failed for patch
set1 in patch493.Test results showing error. So i added cmos.layout
file.Later i done abuild,then also it is showing errors. Errors are-
need to add smbus.c, smbus.h ,early_setup.c file for Southbridge
i63xx.
So p
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