Carl-Daniel Hailfinger wrote:
> Am 29.06.2012 16:49 schrieb Stefan Monnier:
> >> You do know that all Thinkpad T60/X60 can replace the BIOS with coreboot?
> > No, I didn't, that would be wonderful news.
If you happen to be in Berlin we can organize some get-together to
liberate some thinkpads. I w
Ronald G. Minnich (rminn...@gmail.com) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1159
-gerrit
commit 20b915f02ecd847742920f8faccea2ec8c28b7af
Author: Ronald G. Minnich
Date: Mon Jul 2 09:41:10 2012 -0700
PCI Type2 config must die
P
Dan Connelly wrote:
> I have decided to put coreboot and linux loader into the existing
> ROM (with reasonable effort).
> Or, perhaps onto a spare chip for the ROM socket.
Yes, using spare chip is the good way.
Depending on your definition of reasonable the project can succeed.
If you have zero
Dave Frodin (dave.fro...@se-eng.com) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1162
-gerrit
commit a2f1d03b8c9cc11272a1d23cd0729c5c0b38dcb6
Author: Dave Frodin
Date: Mon Jul 2 14:30:19 2012 -0600
IEI/Kino: Allow 64 bit versions of Windows t
Dave Frodin (dave.fro...@se-eng.com) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1161
-gerrit
commit d2dcdb021028d090187d55132cf9f6da9ff9e21d
Author: Dave Frodin
Date: Mon Jul 2 14:31:53 2012 -0600
AMD/Mahogany_Fam10: Allow 64 bit version of
Anton Kochkov (anton.koch...@gmail.com) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1145
-gerrit
commit 92cd6bc1170f57eb5a2adb20dd603041eed9ddf4
Author: Anton Kochkov
Date: Thu Jun 28 08:30:15 2012 +0400
libpayload: add controller type in usb
On Mon, 2012-07-02 at 08:43 -0700, ron minnich wrote:
> Hi Sven, this is great, I approved it.
>
> I am going to be looking at something I wanted to mention here. On
> machines with SMP, I want to make hardware main send the SIPI right
> after console is set up, rather than waiting as long as we d
the following patch was just integrated into master:
commit c053d7c6aa18b50a9dcf9081d8f6067e754910ab
Author: Sven Schnelle
Date: Tue Jun 26 09:11:55 2012 +0200
remove CONFIG_SERIAL_CPU_INIT
The new broadcast code doesn't support serial init - if a CPU
needs serial init, this sh
Sven Schnelle (sv...@stackframe.org) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1140
-gerrit
commit c053d7c6aa18b50a9dcf9081d8f6067e754910ab
Author: Sven Schnelle
Date: Tue Jun 26 09:11:55 2012 +0200
remove CONFIG_SERIAL_CPU_INIT
Th
Ronald G. Minnich (rminn...@gmail.com) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1159
-gerrit
commit 1baeb2f854259385c4bb797e625b9d52831568ac
Author: Ronald G. Minnich
Date: Mon Jul 2 09:41:10 2012 -0700
PCI Type2 config must die
P
the following patch was just integrated into master:
commit 0c18ec83951db47d4bf84503c3553212d77d4b00
Author: Sven Schnelle
Date: Sun Jun 17 10:32:55 2012 +0200
Use broadcast SIPI to startup siblings
The current code for initializing AP cpus has several shortcomings:
- it a
Ronald G. Minnich (rminn...@gmail.com) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1159
-gerrit
commit 4132ad61165e786590051bca454c34a1124fffc1
Author: Ronald G. Minnich
Date: Mon Jul 2 09:41:10 2012 -0700
PCI Type2 config must die
P
Ronald G. Minnich (rminn...@gmail.com) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1160
-gerrit
commit 05fdc6324a51e2294f466f73a8a82909a071189e
Author: Ronald G. Minnich
Date: Mon Jul 2 09:46:42 2012 -0700
Fix the error message for romstage w
Ronald G. Minnich (rminn...@gmail.com) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1159
-gerrit
commit 07e3a917ccd6db641f7b3406abda3c9f46089749
Author: Ronald G. Minnich
Date: Mon Jul 2 09:41:10 2012 -0700
PCI Type2 config must die
P
Hi Sven, this is great, I approved it.
I am going to be looking at something I wanted to mention here. On
machines with SMP, I want to make hardware main send the SIPI right
after console is set up, rather than waiting as long as we do now. The
reason is I need them to get through their startup an
Dear coreboot folks,
the image Cristi gave me works fine. Looking through some log files I
notice the following error message in the Linux kernel ring buffer
(`dmesg`).
ACPI: Invalid PBLK length [0]
Please find the full output and the coreboot config attached. Does
someone else have the
Sven Schnelle (sv...@stackframe.org) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1139
-gerrit
commit 0c18ec83951db47d4bf84503c3553212d77d4b00
Author: Sven Schnelle
Date: Sun Jun 17 10:32:55 2012 +0200
Use broadcast SIPI to startup siblings
Ticket
Owner
Status
Description
#186 ste...@coresystems.de new 3com 3c905tx / gpxe boot problem
#185 ste...@coresystems.de new Vtech partial success
#184 ste...@coresystems.de new Asus p2b with aty128 fails
the following patch was just integrated into master:
commit 18165693d04195d9fb80c13e1e420cb9be8991b6
Author: Kyösti Mälkki
Date: Wed Jun 27 16:14:49 2012 +0300
Intel CPUs: execute microcode update only once per core
Early HT-enabled CPUs do not serialize microcode updates within a
On Mon, Jul 2, 2012 at 3:39 PM, Carl-Daniel Hailfinger
wrote:
> [adding coreboot mailing list to CC]
>
> Am 29.06.2012 16:49 schrieb Stefan Monnier:
> Admittedly the information about coreboot on a T60/X60 is spread around
> quite a bit:
> http://www.coreboot.org/Thinkpad_X60s has some status info
Carl-Daniel Hailfinger writes:
> [adding coreboot mailing list to CC]
>
> Am 29.06.2012 16:49 schrieb Stefan Monnier:
>>> You do know that all Thinkpad T60/X60 can replace the BIOS with coreboot?
>> No, I didn't, that would be wonderful news.
>> I see a few mentions of T60 support when googling f
Carl-Daniel Hailfinger writes:
> [CC coreboot@coreboot.org]
>
> Am 01.07.2012 16:45 schrieb Henrique de Moraes Holschuh:
>> On Mon, 25 Jun 2012, Carl-Daniel Hailfinger wrote:
>>> You do know that all Thinkpad T60/X60 can replace the BIOS with coreboot?
>> How would that work? About half the stuf
[adding coreboot mailing list to CC]
Am 29.06.2012 16:49 schrieb Stefan Monnier:
>> You do know that all Thinkpad T60/X60 can replace the BIOS with coreboot?
> No, I didn't, that would be wonderful news.
> I see a few mentions of T60 support when googling for it, but nothing
> sufficiently clear t
Sven Schnelle (sv...@stackframe.org) just uploaded a new patch set to gerrit,
which you can find at http://review.coreboot.org/1139
-gerrit
commit e0964bb5d09604ee29be453a353364e593899410
Author: Sven Schnelle
Date: Sun Jun 17 10:32:55 2012 +0200
Use broadcast SIPI to startup siblings
Kyösti Mälkki (kyosti.mal...@gmail.com) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/642
-gerrit
commit 65529a4d5647fafe0320fe4e3a5b497dc5dd6d1d
Author: Kyösti Mälkki
Date: Thu Jun 28 21:50:43 2012 +0300
Intel model_106cx: change CAR to model_
Kyösti Mälkki (kyosti.mal...@gmail.com) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1146
-gerrit
commit c4077f711d84cf6084c97af47adf0c2afecc352d
Author: Kyösti Mälkki
Date: Sat Jun 30 11:41:08 2012 +0300
Intel cpus: Extend cache to cover comp
Kyösti Mälkki (kyosti.mal...@gmail.com) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/1147
-gerrit
commit cdee7dbfc78a3d171feec85e0d57c70c569a455d
Author: Kyösti Mälkki
Date: Sat Jun 30 11:42:08 2012 +0300
Enable ROM cache for payload decompres
[CC coreboot@coreboot.org]
Am 01.07.2012 16:45 schrieb Henrique de Moraes Holschuh:
> On Mon, 25 Jun 2012, Carl-Daniel Hailfinger wrote:
>> You do know that all Thinkpad T60/X60 can replace the BIOS with coreboot?
> How would that work? About half the stuff the firmware does is an
> interaction b
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