Am Montag, den 25.08.2014, 15:24 -0700 schrieb ron minnich:
On Mon, Aug 25, 2014 at 3:21 PM, Paul Menzel wrote:
Another approach would be to do it like the Chromium OS folks do it on
the Google Chromebooks. In normal mode they do not initalize the graphic
device (just place the Video
Dear Charles, dear David,
Am Montag, den 25.08.2014, 11:21 -0600 schrieb David Hubbard:
I'm focusing in on this error message first:
ACPI Warning: For \_SB_.PCI0.LPCB.EC__.LED_: Excess arguments - needs 1,
found 2
Can you take a look at the .asl files in your coreboot build? I believe
TROLL So we can kiss goodbye coreboot on AMD platforms in the future?.. How
sad! :-/ /TROLL
Does this thing Platform Security Processor exist in any AMD CPUs buyable
today (Q3 2014) or it will begin to be implemented later?
Thank you for this information!
Florentin
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Here is some further notes that I collected:
There are issues with i945 text mode graphics initialization:
http://www.coreboot.org/pipermail/coreboot/2014-August/078468.html
look into it, follow up on that post and try to fix it.
Trisquel
Hello
Not sure!
Apparently, after doing echo 0 blink /proc/acpi/ibm/led, this is handled
led_set_status in drivers/platform/x86/thinkpad_acpi.c : the first argument
is the led, the second the status :
acpi_evalf(led_handle, NULL, NULL, vdd, led, led_led_arg1[ledstatus]))
For the LED string, see
Here's what I know about PSP:
I'm utterly ignorant of the PSP -- is this thing like the Intel ME, and
how scared should we be of it?
Somewhat scared.
The PSP is an actual processor that takes control when reset is released.
The x86 does not start fetching code until the PSP is satisfied that
On 26.08.2014 08:50, Paul Menzel wrote:
Dear Charles, dear David,
Am Montag, den 25.08.2014, 11:21 -0600 schrieb David Hubbard:
I'm focusing in on this error message first:
ACPI Warning: For \_SB_.PCI0.LPCB.EC__.LED_: Excess arguments - needs 1,
found 2
Can you take a look at the
On 26.08.2014 17:53, Charles Devereaux wrote:
My understanding is that the OS does the call that correctly, but that
coreboot ASL tables only expect one argument.
Please provide a refrence when doing such bold claims. LED method is not
specified in ACPI, so assuming that it takes any particular
Hello,
Has anybody tested reset signal (PMU_RESETBUTTON_B) on Rangeley/Avoton? The
board seems to shut down after asserting the signal (pushing the reset
button). I turn on an LED in early_mainboard_romstage_entry(). The LED was
not on indicating the function was not executed. Below is what
Hi Ron,
Am 26.08.2014 00:22 schrieb ron minnich:
disabling the usb stack is the goal in this case.
AFAIK it's called USB keyboard support, USB legacy support or
something similar in most BIOSes. This internally maps a USB keyboard to
a virtual PS/2 keyboard and sometimes has quite a few issues.
Am 26.08.2014 20:00 schrieb Bruce Griffith:
Here's what I know about PSP:
I'm utterly ignorant of the PSP -- is this thing like the Intel ME, and
how scared should we be of it?
Somewhat scared.
The PSP is an actual processor that takes control when reset is released.
The x86 does not start
Hello,
Just checked some binaries - PEI USB driver is loading anyway, no
checking for any setup option, so I guess it will be very hard even
with the unpacking UEFI image and removing these drivers. Also in most
UEFI systems big part of USB driver working in SMM mode, so it will be
hard to patch
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