Re: [coreboot] [Coreboot] Misalignment with GCC 4.9.1

Ah, peter, thanks for asking this question. Yes, it's very good to avoid gcc-isms. We have had many, and probably have some left, but it's nice to avoid them. ron On Mon, Oct 13, 2014 at 6:18 PM, Peter Stuge wrote: > Lin, Ryan wrote: >> If we add aligned(4) to the define as the following : >> >>

Re: [coreboot] [Coreboot] Misalignment with GCC 4.9.1

Lin, Ryan wrote: > If we add aligned(4) to the define as the following : > > #define BOOT_STATE_INIT_ATTR __attribute__ ((used, aligned(4), section > (".bs_init))) > > We can get 4-byte alignment for .bs_init. > > What is your thoughts on this? Is that a GCC extension? The coreboot codebase

Re: [coreboot] [Coreboot] Misalignment with GCC 4.9.1

Hi Peter, It should be unpatched GCC 4.9, and I found out that .bs_init is force 32-byte alignment with GCC 4.9. Dump from ramstage.o 12 .bs_init 00c8 00036160 2**5 CONTENTS, ALLOC, LOAD, RELOC, DATA As the result, padding datd is added to mrc_

Re: [coreboot] Prague meeting: Work on USB debug

Nico Huber wrote: > I had first success with my pomona clip, today. Sadly, the mobo does > not have any UART, What board is it? > so I'll finally have to switch to something more advanced. Is LPC available on the board? > I've a high-speed ftdi usb adapter board that can be used as USB debug d

[coreboot] Wiki access

Hi, looks like I don't have an account for the coreboot wiki, yet. Well, at least I don't remember, and can't find any stale email... Nico -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Prague meeting: Work on USB debug

Hi folks, I had first success with my pomona clip, today. Sadly, the mobo does not have any UART, so I'll finally have to switch to something more advanced. I've a high-speed ftdi usb adapter board that can be used as USB debug device, but this will need some code changes along with some refact