[coreboot] Baytrail How to enable PM1_STS_EN.PCIEXP_WAKE_EN register bit

Hi Experts, I need to enable power management register bit (PM1_STS_EN.PCIEXP_WAKE_EN) of baytrail. I searched for PM1_STS_EN in the source but didn't find anything related to that. Any suggestion how to do it? Best Regards -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/

Re: [coreboot] WOL/PCI PME wakeup from S3 Baytrail SoC (Bayleybay CRB)

I remember WOL PME wakeup function need configure 3-4 different areas, 1) SoC ACPI registers: Enable PCIE PME in PM and GPE registers. 2) PCIE Card ACPI register: Yeah, you need set some registers of the PCIE card to allow it waked by packages. 3) Report WOL PME single in ASL _GPE{} with _Lxx me