Hello, Nico.
Yes, now I'm using VGA port. Yes, we'll commit our changes, but after we'll
end port. S3 isn't working now, and we have some troubles with Super I/O,
but we already did this work with b75-port.
2017-07-29 22:06 GMT+03:00 Nico Huber :
> Hi Konstantin,
>
> On 29.07.2017 06:57, Konstant
Hi Konstantin,
On 29.07.2017 06:57, Konstantin Novikov wrote:
> Hello again, coreboot community!
>
> Thanks a lot Zoran Stojsavljevic and Nico Huber for their help and answers.
> You're lead us in "GFX-way", so it was a right direction.
> At first, we're added our PCI id in two structures (map_opr
Konstantin Novikov wrote:
> gma_setup_panel(dev)
> - this function was critical for us.
>
> gtt_write(DDI_BUF_CTL_A, DDI_BUF_IS_IDLE | DDI_A_4_LANES |
> DDI_INIT_DISPLAY_DETECTED);
> Without DDI_A_4_LANES in this row we saw the Linux Ubuntu output
Should this perhaps become a Kconfig option to be
Since your board is a Broadwell-U, easiest way will be to extract it (along
with the required refcode blob) from the generic/shellball image firmware
for a Broadwell-U Chromebook (using cbfstool), which itself can be
extracted from a ChromeOS recovery image. John Lewis wrote up some helpful
instru
Dobro Pozalovat6 na Coreboot.. Esli voproci vozniknut/est6, prosto
posilaite ssilki. :-)
Gde bi mne konec bil kogda/esli bi ja Nemeckij boltal hotja na pol-Russkogo
?! :-((
Udaci!
Zoran
On Sat, Jul 29, 2017 at 6:57 AM, Konstantin Novikov
wrote:
> Hello again, coreboot community!
>
> Thanks a l
Hi, All,
I am debugging a i7-5650 board. I use IBV's BIOS to wrap the coreboot, i.e,
replace the BIOS Region with coreboot.rom.
So I assume the ME blob can work.
I wonder if it is the right way.
Is it fully supported by Coreboot?
How can we get MRC.bin and other blobs?
Thanks.
Zheng
coreboot-4
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