[coreboot] Support for HP Pavilion g7 2269wm

Hi, Would it be possible to add coreboot support for the HP Pavilion g7 2269wm. The hardware is very similar to the HP Pavilion m6 1035dx which supports coreboot so it may be possible to run coreboot on it. CPU : AMD A8-4500M FCH : AMD Hudson FCH (from looking at dmesg cant be 100% correct)

[coreboot] ASUS KGPE-D16 Automated Test Failure [master]

The ASUS KGPE-D16 fails verification for branch master as of commit b2b1d668269c8af2551df0dbb26a350f92a6795a The following tests failed: BOOT_FAILURE Commits since last successful test: b2b1d66 util/kbc1126: [cosmetic] change Makefile casing 588c2c4 soc/intel/cannonlake: Rectify LPC Lock Enable

Re: [coreboot] x86 : Puzzles about init IDT

Hi, On 16.08.2017 05:17, 王翔 wrote: > The source code may have a problem when the IDT is initialized. > This code is located in `src/cpu/x86/16bit/entry16.inc`. > -- > movw%cs, %ax > shlw

Re: [coreboot] Howto enable AMD Cool'n'Quiet support

Hi, I checked coreboot.rom-file and my vendor BIOS for that but can't find it. The coreboot provides the _PSS ACPI objects and not that PSB table. I guess you miss the _PSS objects for some reason. Did I miss to enable something in make menuconfig? Can someone give me a hint how to find

Re: [coreboot] x86 : Puzzles about reset code

2017-08-16 5:03 GMT+02:00 王翔 : > What is the meaning of hand coding? In 16-bit mode, the last two bytes are ignored. This is _very_ old code. Back in the day, before we started to strongly encourage people to use our compiler, we had to deal with tons of different versions of the