[coreboot] New Defects reported by Coverity Scan for coreboot

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. 3 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Re

Re: [coreboot] Questions about using coreboot riscv with qemu

I used to use spike exclusively. But, if you have a bit of money spend, get an arty board and get the bitstream and use "real" hardware. Lots better. On Tue, Sep 11, 2018 at 3:44 PM Angel Pons wrote: > Hello, > > > qemu-system-x86_64 -bios build/coreboot.rom -serial stdio > > Note that this comm

Re: [coreboot] Questions about using coreboot riscv with qemu

Hello, > qemu-system-x86_64 -bios build/coreboot.rom -serial stdio Note that this command is for x86_64, which is not the architecture the author of this thread is referring to (RISC-V) Regards, Angel Pons -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listin

Re: [coreboot] RISC-V HiFive Unleashed board added to coreboot - has PCI-e slots via exp board

Hi, Sifive did great job [1] [2] and everything is now opensource including mask rom loader. "Today we’re finally able to rectify this issue by releasing the FU540-C000’s ZSBL and FSBL as an open source project, which can be found on GitHub like all of SiFive’s other open source projects." An

Re: [coreboot] Questions about using coreboot riscv with qemu

Hi, you can use this command qemu-system-x86_64 -bios build/coreboot.rom -serial stdio This can display with serial port. Thanks, On Mon, Sep 10, 2018 at 10:04 AM Liam Naddell wrote: > This is my first time using a mailing list btw, sorry. > > > I was wondering how I could test the images I h