Am Di., 25. Sep. 2018 um 12:27 Uhr schrieb Peter Stuge :
>
> Christian Gmeiner wrote:
> > Most of the time the system works as expected but from time to rebooting
> > the system fails completely.
>
> Only ever when rebooting, or does cold boot also fail sometimes?
>
Both fail.
> (Make a test syst
On Wed, Oct 3, 2018 at 7:00 AM ron minnich wrote:
> I'm wondering ... does anyone know the limits on SMM memory size for this
> part?
>
>
SMM memory size was determined by the MCH part, not ICH. The boards we had
with i82801dx used ASEG with 128 kiB of SMRAM. The only remaining user of
i82801dx
On Thu, Oct 11, 2018 at 3:24 AM Antony AbeePrakash X V
wrote:
>
> Hi All,
>
> We are able to achieve the memory initialization time reduction. Now we have
> achieved the boot time as 5sec until the Postcode 0xf8 (entry into Elf boot).
>
> We have reduced the unwanted codes. We would like to reduc
cbmem timstamps will be needed.
Looks like FSP is manipulating the tsc:
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 4291539104 exit 0
I have a hard time believing that took 4291 seconds.
On Thu, Oct 11, 2018 at 10:11 AM Antony AbeePrakash X V <
antonyabee.prakas...@lnttechservices.com> wrot
Hi All,
We are able to achieve the memory initialization time reduction. Now we have
achieved the boot time as 5sec until the Postcode 0xf8 (entry into Elf boot).
We have reduced the unwanted codes. We would like to reduce the boot time to
less than 2sec.
Could anyone please tell what can be d
Hi Aaron,
PFA the console log for your reference.
Please look into this and provide feedback.
Thanks,
Antony
-Original Message-
From: Aaron Durbin [mailto:adur...@google.com]
Sent: Thursday, October 11, 2018 7:27 PM
To: Antony AbeePrakash X V
Cc: Coreboot ; Dinesh Kumar
Subject: Re:
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