Hi friends,
On Sat, Feb 16, 2019 at 11:56 PM Matt B wrote:
>
> Is there a config to disable the dGPU to save power if one is present?
>
I haven't checked if "disabled" (not initialized) dGPU consumes less
power than "enabled" (initialized) but not used dGPU. But I think such
a config is needed -
Hi,
On Sun, Feb 17, 2019 at 12:18 AM Matt B wrote:
>
> It's somewhat unclear form the slides, but it looks like these target the 17h
> (ryzen) psp. Do the same exploits also affect earlier versions?
>
I think these attacks are possible because of the general flaws at PSP
architecture, so yes th
On Sat, Feb 16, 2019 at 06:00:26PM +0100, Nico Huber wrote:
Generally, what locking options you have depend much on your hardware.
Hence, there is no generic solution in coreboot. Plus, coreboot is more
a firmware framework than a firmware. It can only "boot" programs from
flash and not your OS f
This fairly interesting stuff. With the fairly wide range of attacks
(arbitrary code execution and faking signatures for modules) maybe some
sort of runtime "psp-cleaner" might be possible, but it would probably be a
crushingly difficult undertaking.
It's somewhat unclear form the slides, but it l
Out of curiosity, is there a config to disable the dGPU to save power if
one is present?
Thanks,
-Matt
On Sat, Feb 16, 2019 at 9:12 AM Kyösti Mälkki
wrote:
>
>
> On Sat, Feb 16, 2019 at 3:49 PM Mike Banon wrote:
>
>> I almost completed refining the HJK's dGPU patches and discrete GPU is
>>
Hello Alex,
On 16.02.19 18:39, Alex Feinman wrote:
> In my Coreboot build I provide both VBIOS and VBT blobs via appropriate
> configuration items. The VBIOS blob contains expected signature at the
> top and VBT is valid as confirmed by running intelvbttool against it.
> The platform is slightly m
On Sat, Feb 16, 2019 at 4:31 AM Frank Beuth wrote:
> On another mailing list, someone commented "I would never use Coreboot,
> because
> it would let malware flash your bios from within Linux." (paraphrased)
well, send them here, and we can try to explain the world as it is.
But this particula
In my Coreboot build I provide both VBIOS and VBT blobs via appropriate
configuration items. The VBIOS blob contains expected signature at the top and
VBT is valid as confirmed by running intelvbttool against it. The platform is
slightly modified kblrvp (RVP3).
During the build I can see cbfsto
On 16.02.19 16:08, Frank Beuth wrote:
> On Sat, Feb 16, 2019 at 05:23:40PM +0300, Sergej Ivanov wrote:
>> To make a real write protection on your spi flash you may go two ways
>> after
>> setting region protection and configuration bits in your flash
>
> Where are the write protection bits for the
On Sat, Feb 16, 2019 at 05:23:40PM +0300, Sergej Ivanov wrote:
To make a real write protection on your spi flash you may go two ways after
setting region protection and configuration bits in your flash
Where are the write protection bits for the flash set, in which menu / config
file? That is
To make a real write protection on your spi flash you may go two ways after
setting region protection and configuration bits in your flash
1) Write a SMM handler, that will prevent software to set high level on SPI
#WP/WE pin (that can be done it it connected to chipset) absolute
chipset-specific,
On Sat, Feb 16, 2019 at 3:49 PM Mike Banon wrote:
> I almost completed refining the HJK's dGPU patches and discrete GPU is
> still working at my G505S after these changes, but before submitting
> the patches I would like to make sure that they are not breaking the
> things for G505S without a dis
Hello,
On Sat, Feb 16, 2019, 14:49 Mike Banon https://github.com/informer2016/shared_devfiles/blob/master/coreboot.rom
How can one build a coreboot.rom like this one with the patches you
mentioned?
Best regards,
Angel Pons
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I almost completed refining the HJK's dGPU patches and discrete GPU is
still working at my G505S after these changes, but before submitting
the patches I would like to make sure that they are not breaking the
things for G505S without a discrete GPU. So if you have some free time
and ready to "unbri
On Thu, Feb 14, 2019 at 12:21:36PM -0500, Matt B wrote:
For Coreboot afaik the only two methods available are to flash with a
programmer or to flash internally from linux with iomem=relaxed.
On another mailing list, someone commented "I would never use Coreboot, because
it would let malware fl
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