Sorry, I'll commit this instead of continuing to post here but I thought
that I should add that the diff is useless too.
On Wed., 18 Sep. 2019, 8:40 pm Angel Pons, wrote:
> Hi Benjamin,
>
> Yes, the link was moved there the other day.
>
> Best regards,
>
> Angel
>
> On Wed, Sep 18, 2019, 12:34
On Thu, Sep 19, 2019 at 3:20 AM Matt B wrote:
>
>
> Kyösti Mälkki said:
>>
>> AFAICS, that platform codebase even suffers from cache coherency issues
>> while executing from cache-as-ram; there has been indications that increased
>> spinlock usage in romstage causes boot failures and/or reset
Kyösti Mälkki said:
> AFAICS, that platform codebase even suffers from cache coherency issues
> while executing from cache-as-ram; there has been indications that
> increased spinlock usage in romstage causes boot failures and/or reset
> loops.
>
Where do you see this? Has it been reported?
On Thu, Sep 19, 2019 at 1:05 AM Martin Roth wrote:
>
> My proposal is to drop platforms that aren't being tested, aren't
> being maintained, or are causing serious problems with general
> coreboot development.
>
> For example
> - ASUS KGPE-d16 is still being used and tested, so I wouldn't suggest
Hi Philipp,
there is some documentation you might have missed [1] (can't blame you,
the index is broken [2]).
On 18.09.19 23:23, Philipp Stanner wrote:
> Am Montag, den 16.09.2019, 07:20 -0700 schrieb Stefan Reinauer:
>> Yes, this is often done as a cost reduction method. The habit started
>>
My proposal is to drop platforms that aren't being tested, aren't
being maintained, or are causing serious problems with general
coreboot development.
For example
- ASUS KGPE-d16 is still being used and tested, so I wouldn't suggest
dropping that code, even though it apparently doesn't support
Am Montag, den 16.09.2019, 07:20 -0700 schrieb Stefan Reinauer:
> Yes, this is often done as a cost reduction method. The habit started
> with the arrival of the ME and the firmware descriptor allowing you
> to spread your different firmware regions across one or both chips.
Hm, surprises me.
This Panic i got in the past two.
Try building coreboot without Microcode included and load microcode via
kernel (you need non-free repo for that)
Would be interessting if you than also my Error.
If so i can send you a deb-package with a working kernel with SLAB
allocator.
Am 18.09.19 um
Hi,
maybe related:
With coreboot master (as of 20190916), 4.10 and 4.9 (compiled on Debian
10) I get kernel panics, too. Log and config attached. There is one
Opteron 6328 installed in the KGPE-D16. I'm using the GRUB2 payload
(which runs fine). I don't know what's causing this, I just want to
Highly appreciating that afford.
Would like to mention Problems with Current Linux kernel with this Board.
( The SLUB Allocator is causing panics at boot for my builds)
Pls see:
https://www.mail-archive.com/coreboot@coreboot.org/msg53915.html
> Hi all,
> we see a lot of attention around
Benjamin Doron schrieb am Mi., 18. Sep. 2019,
12:34:
> Angel, the link you sent is unavailable now, but is the gist of it that I
> attempt to commit and Gerrit automatically puts it into review?
>
> Also, would this (https://doc.coreboot.org/tutorial/part2.html) be where
> the link was moved?
>
Hi Benjamin,
Yes, the link was moved there the other day.
Best regards,
Angel
On Wed, Sep 18, 2019, 12:34 Benjamin Doron
wrote:
> Angel, the link you sent is unavailable now, but is the gist of it that I
> attempt to commit and Gerrit automatically puts it into review?
>
> Also, would this
Angel, the link you sent is unavailable now, but is the gist of it that I
attempt to commit and Gerrit automatically puts it into review?
Also, would this (https://doc.coreboot.org/tutorial/part2.html) be where the
link was moved?
___
coreboot mailing
For some reason, the console log that I attempted to attach did not seem to
reach the list. I'll paste it here:
"coreboot-4.10-528-g809b7513a2-2.0-beta1 Mon Sep 2 20:08:20 UTC 2019 bootblock
starting (log level: 7)...
CPU: Intel(R) Core(TM) i7-6500U CPU @ 2.50GHz
CPU: ID 406e3, Skylake D0,
On 17.09.19 17:28, Denis 'GNUtoo' Carikli wrote:
> On Tue, 17 Sep 2019 10:21:38 +0200
Raw card type:D
> Is there more information on such "card type" somewhere?
JEDEC specifies these reference cards. Sometimes you can get their
specification for free (need to register to their webpage,
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