[coreboot] Re: [GSoC] Self Introduction

Thanks! I'd be working on streamlining the usage of POST code calls. Since the usage of postcodes is scattered and as there are lots of redundant usage of postcode calls across the codebase. I would try to document all of the POST codes used in the codebase and make an effort to make use of al

[coreboot] beginner's despair ;) coreboot update via internal fails

Hi, I want to contribute to the board status database. For this I did a build from 4.11 branch. This is flashing from the OS for the first time. the SPI command I used was: ./flashrom/flashrom -p ch341a_spi -l firmware/orig/X220/x220-orig.bin.layout -i bios -w coreboot/build/coreboot.rom -c MX25

[coreboot] Re: beginner's despair ;) coreboot update via internal fails

Solved it already. added --noverify-all this sounds dangerous but it just doesn't verify the areas it did't write. o.O Am 07.05.20 um 16:43 schrieb JPT: > Hi, > > I want to contribute to the board status database. > For this I did a build from 4.11 branch. > > This is flashing from the OS for th

[coreboot] Re: beginner's despair ;) coreboot update via internal fails

Hi JPT, The --no-verify-all option is useful when you are flashing an image on Intel platform that has ME and IFD regions locked/read-only. Even if using --ifd -i bios, flashrom will verify whole image against the binary file you passed to flashrom. --no-verify-all option tells flashrom "please ve

[coreboot] problems on X220

Hi, I got several problems with coreboot on X220. I report them for you to improve coreboot. I's not important for me. If you need more details on a specific problem, tell me please. This is a build from today 4.11 branch with seabios and memtest payload I've got several boot media ready to test

[coreboot] Re: beginner's despair ;) coreboot update via internal fails

Hi! I'd say that flashrom only verifying the section it writes by default would be less surprising behavior than the current behavior. Regards Felix ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@cor

[coreboot] Re: problems on X220

Dear JPT, Welcome to coreboot and congratulations for successfully running coreboot on a device. Thank you for your report. Am 07.05.20 um 17:38 schrieb JPT: I got several problems with coreboot on X220. I report them for you to improve coreboot. I's not important for me. If you need more

[coreboot] Re: beginner's despair ;) coreboot update via internal fails

Hi, On 07.05.20 18:11, Felix Held wrote: > I'd say that flashrom only verifying the section it writes by default > would be less surprising behavior than the current behavior. we'd need a distinction between reliable and unreliable programmers first. Because not verifying everything with the latt

[coreboot] Re: problems on X220

Hello Jan, On 07.05.20 17:38, JPT wrote: > I got several problems with coreboot on X220. your issues seem very random and unexpected. Three possible explanations come to mind: a) coreboot fails to properly initialize your RAM and this causes general instability. b) your coreboot build is flawed,

[coreboot] Re: problems on X220

Hi Jan, i've a x220 around. If you send me your image, I can take a look, how it behaves on my system. > If you want to further analyze things, please attach your coreboot > `.config`. it's also included in your bios image, if you don't have it anymore. Best, lynxis pgpZJQvGPRxNg.pgp Descri

[coreboot] Re: Hiccups bringing ACPI support to p3b-f

Hi Keith, On 06.05.20 18:50, Keith Hui wrote: > I've run into two problems with this work and hoping for insights. > > First, Linux kernel is throwing a warning. Full dmesg (from kernel > start to prompt) attached, but it's these lines in particular: > > [5.977786] ACPI Warning: SystemIO range