Not really familiar with the PIC32, but do you have some kind of logs for
it? The PIC32 should get the usual power sequence signals from the PCH and
acknowledge them before the host gets back to the reset vector. I had a
similar case in the past where the PCH repeated sending the power
sequencing
Issue #121 has been updated by Anastasios Koutian.
File defconfig added
Andrey A. wrote in #note-70:
> T420 and IVB cpu here again.
> After 9 months with intel_idle.max_cstate=4 (and last kernel and coreboot) I
> get a full stable system without a freeze.
I have a similar setup:
Mainboard:
Hello,
As mentioned in the previous email, I have been looking into the project
where we provide full Clang compiler support to coreboot.
So for that to happen, are we supposed to find the flags that do a similar
job as gcc in clang and look for ways to add the functionalities not
offered by Clang
--
Sincerely,
Ivan Kalashnikov
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