Lets take a slight differently tactic. What would happen if we removed the
ROM from a GPU/NIC? Would the GPU's still require 256MB~304MB of PCI_MMIO?
On Sat, Jan 6, 2018 at 3:00 PM, taii...@gmx.com wrote:
> I have had this issue in regards to SR-IOV, - at the moment coreboot only
> supports 32
What will CoreBoot do if it runs out of room in the PCI_MMIO region?
On Fri, Jan 5, 2018 at 8:49 AM, Adam Talbot wrote:
> "linear address space" != DRAM, got it.
>
> Interesting.
> VGA compatible controller: NVIDIA Corporation GP104 [GeForce GTX 1070]
> (rev a1) (p
"linear address space" != DRAM, got it.
Interesting.
VGA compatible controller: NVIDIA Corporation GP104 [GeForce GTX 1070]
(rev a1) (prog-if 00 [VGA controller])
Subsystem: NVIDIA Corporation GP104 [GeForce GTX 1070]
Flags: bus master, fast devsel, latency 0, IRQ 325
Memory at d800 (3
> > seem to give me any good error codes. Or at least nothing I can go on.
>
> You should have at minimum 1KW PSU for this job. At least... I guess,
> even more (for 16 discrete GPUs) 2 x 1KW would be reasonable.
>
> Zoran
> ___
>
> On Thu, Jan 4, 2018 at 8:38 P
-Coreboot
I am totally off the deep end and don't know where else to turn for
help/advice. I am trying to get 16 GPU's on one motherboard. Whenever I
attach more then 3~5 GPU's to a single motherboard, it fails to post. To
make matters worse, my post code reader(s) don't seem to give me any good
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