[coreboot] Re: switch or router hardware with coreboot

All, Cisco Meraki are possibly the most FOSS hostile vendor I have ever had the displeasure of trying to pry GPL source code from. It took Meraki more than 12 months to provide the coreboot source code for the MX84 and MX250, and that occurred only after we (the hardware owners) lost patience and

[coreboot] Intel sandybridge northbridge with ibexpeak southbridge?

ever be supported is if the missing early_pch_init_native_* functions are implemented for IbexPeak? Kind regards, Hal Martin [1] https://en.wikichip.org/wiki/intel/management_engine [2] https://www.intel.com/content/www/us/en/products/platforms/details/crystal-forest.html?s=Newest [3] ./ifdtool dump.bin PCH

[coreboot] Cisco Meraki use coreboot in some MX products and will not provide the source code

replied to any of my follow up requests. As coreboot is GPL licensed software, I wanted to inform the coreboot community that I believe Cisco Meraki are not acting in good faith and are, in my opinion, violating the GPL by not providing the coreboot source code upon request. Kind regards, Hal Martin

Re: [coreboot] Building coreboot for Apollo Lake: missing 'IFWI' region

Hi Nico, On Tue, May 29, 2018 at 10:24 AM, Nico Huber wrote: > Hello Hal, > > On 28.05.2018 08:06, Hal Martin wrote: > > Name Offset Type Size Comp > > ... > > cpu_microcode_blob.bin 0x6f00 microcode

Re: [coreboot] Building coreboot for Apollo Lake: missing 'IFWI' region

w Hill CRB, but this platform was never added to coreboot. The resulting image does not appear to boot, there is no output on the uart. I can inspect it with ifdtool, but not with ifwitool. Is it expected that ifwitool will not work on the coreboot generated image? Or does this indicate I've ma

Re: [coreboot] Building coreboot for Apollo Lake: missing 'IFWI' region

Hi Nico and Julius, Thank you for the helpful tips. I will look into the fmd files in the tree and see if I can come up with something sensible for this board. I'll update you on any progress (or lack thereof). Cheers, Hal On Sat, May 19, 2018 at 4:57 PM, Nico Huber wrote: > Hi, > > On 19.05.

[coreboot] Building coreboot for Apollo Lake: missing 'IFWI' region

Hi all, I am trying to build coreboot for an Apollo Lake platform. I've read the coreboot presentation on Apollo Lake, and some of the threads about the IFWI on the coreboot mailing list: https://www.coreboot.org/images/2/23/Apollolake_SoC.pdf https://mail.coreboot.org/pipermail/coreboot/2017-Nove

Re: [coreboot] Missing PCIe devices

Hi Nico, On Sun, Jan 14, 2018 at 11:49 AM, Nico Huber wrote: > Hi, > > On 14.01.2018 11:05, Kyösti Mälkki wrote: > > On Sun, Jan 14, 2018 at 11:27 AM, Hal Martin > wrote: > >> Just to verify again, I enabled all the PCI Express devices in the > >> devicet

Re: [coreboot] Missing PCIe devices

Hi Kyösti, Thank you for the hints. I have some comments below. On Sat, Jan 13, 2018 at 8:59 PM, Kyösti Mälkki wrote: > Hi > > On Sat, Jan 13, 2018 at 8:51 PM, Hal Martin wrote: > > Hi all, > > > > Is there any documentation around describing how coreboot scans fo

[coreboot] Missing PCIe devices

Hi all, Is there any documentation around describing how coreboot scans for PCI Express buses and devices? I have an expansion module for the Intense PC I'd like to get working with Coreboot. The expansion module adds 4 Intel Gigabit Ethernet interfaces (82574L) via PCI Express 4 PCIe ports. All

[coreboot] Logging from within romstage? Problems initializing uart

Hi all, I have been asked to clean up my patch enabling SuperIO uart on the intense-pc: https://review.coreboot.org/#/c/coreboot/+/22737/ The SIO1007 is supposed to properly initialize the UART in the sio1007_enable_uart_at(), but when I call it nothing seems to happen and the uart doesn't end up

[coreboot] Your me_cleaner experiences/anomalies

Hi all, I know me_cleaner is not directly related to coreboot, but I think that coreboot users are among the most common people to use me_cleaner. I have run me_cleaner on an Ivy Bridge platform firmware. In both the original vendor firmware and coreboot, cleaning the ME causes all chipset SATA p

Re: [coreboot] SeaBIOS boot order / can't boot from USB

things > down are connected devices which don't initialize/respond to queries within > the USB spec, but this is regardless of their presence in the bootorder file > > > On Sat, Dec 2, 2017 at 12:16 PM, Hal Martin wrote: > >> Hi Matt, >> >> That's a great tip

[coreboot] SeaBIOS boot order / can't boot from USB

Hi all, I'd like to learn more about SeaBIOS boot order, but unfortunately I wasn't able to find the answer to my question on the wiki page: https://www.coreboot.org/SeaBIOS#Configuring_boot_order I would like to add a bootscript for SeaBIOS to search for USB boot devices before falling back to t

[coreboot] SeaBIOS boot order / can't boot from USB

Hi all, I'd like to learn more about SeaBIOS boot order, but unfortunately I wasn't able to find the answer to my question on the wiki page: https://www.coreboot.org/SeaBIOS#Configuring_boot_order I would like to add a bootscript for SeaBIOS to search for USB boot devices before falling back to t

[coreboot] compulab_ltd/intense-pc: new Ivy Bridge board

Hello all, This is my first time working with coreboot. I've read the documentation, but I will probably make many noob mistakes. Sorry in advance! I've used autoport to create a new port for the CompuLab Intense PC (also sold as the "MintBox 2"). I've flashed the resulting coreboot.rom (includi