ld be an RS880/RS890 northbridge. The processor is fam10h.
Can anyone give me a statement if there is already a similar board working or
which board would be the best starting point to look at?
Any hints and recommendations are welcome.
Kind regards,
Harald Gutmann
--
coreboot ma
On Monday 09 May 2011 07:37:32 Rudolf Marek wrote:
> Hi all,
>
> I think it is time to make a reservation for the Hotel/Hostel. Is there
> anyone else besides Peter, Sven and Florentin? Just reminding that it take
> place in Prague on last weekend in May.
Hey, that's a good date as I'd be anyways
On Monday 08 November 2010 15:30:44 Peter Stuge wrote:
> Harald Gutmann wrote:
> > Just for my personal interest, could someone explain me what
> > actually is called romstrap?
>
> It's a horrible name for permanent settings that are stored in the
> boot flash.
I
ll read cycle of the bios flash.)
Is there any fast method to read the onboards NIC mac address "faster"?
> Jonathan Kollasch
Kind regards,
Harald Gutmann
[1] http://www.mail-archive.com/linuxb...@linuxbios.org/msg11462.html
[2] http://tracker.coreboot.org/trac/coreboot/attac
ange.
Kind regards,
Harald
On Thursday 04 November 2010 19:28:39 Scott Duplichan wrote:
> -Original Message-
> From: coreboot-boun...@coreboot.org [mailto:coreboot-boun...@coreboot.org]
> On Behalf Of Harald Gutmann Sent: Thursday, November 04, 2010 12:46 PM
> To: coreboot@c
who read until here, thank you for your time reading the mail.
Kind regards,
Harald Gutmann
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
Hello!
Yesterday I tried coreboot again, and it worked fine so far.
But I faced a nasty problem, like the last time I tried it with the MAC
address on MCP55. This is nothing serious as you can change it by editing the
romcache.inc from the southbridge, but it's nasty.
I was thinking about fixi
Hello Frederic,
I'm sorry to get a bit "rude" in my answer, but here is what I want to say:
"crashing on Ubuntu logo"
Oh, that's really a nice description of what happens. No way to tell you
what's the problem with your bios, without a more detailed error output.
And yes you couldn't see a lot
Wow, that's once again great news!
Thanks!
Harald
On Friday 23 April 2010 03:24:43 Bao, Zheng wrote:
> DDR3 supporting is added.
>
> More testing need to be done. But we don't have boards that cover
> all the options.
>
> Features that have been tested.
> The socket AM3 and ASB2.
> Single rank
On Thursday 15 April 2010 17:22:29 Keith Hui wrote:
> So realistically how soon can I expect practical RS880/785G support,
> if not already? My dev machine/home server/HTPC rocks a Asus
> M4A785TD-M EVO with this chipset. I'll assemble a dump later but it
> sports, off my head:
> Phenom II X4 965
>
On Friday 09 April 2010 16:12:28 Harald Gutmann wrote:
> On Thursday 08 April 2010 20:45:34 ron minnich wrote:
> > I have a lenovo x300 somebody set the password on and ... as you guess,
> > forgot.
>
> As Rudof suggested, you can probably use the master password for recov
On Thursday 08 April 2010 20:45:34 ron minnich wrote:
> I have a lenovo x300 somebody set the password on and ... as you guess,
> forgot.
As Rudof suggested, you can probably use the master password for recovery if
it works.
Otherwise I recommend for such situations the cmospwd utility from cgse
Awesome!
Thanks AMD - It's really a great pleasure to see that released.
Keep going with such great open policy steps.
Open specifications of ATI graphic devices was the first great deal, and now
coreboot support on recent chips is just really cool.
Harald Gutmann
On Monday 15 March
Just to mention it:
I tried to boot the same image now with an even number of RAM banks in the
machine. It didn't solve anything, but it seems that the dual-channel
detection works fine according to the log.
Here is the log with 4x1Gb in the machine:
coreboot-2.0.0-r5084M_m57sli_Fallback Thu Fe
On Thursday 04 February 2010 13:19:03 Stefan Reinauer wrote:
> Can you do a binary search to find the revision that broke it?
I'll try to find the revision which broke it.
This will just take some time.
Hopefully I can find it this afternoon.
--
coreboot mailing list: coreboot@coreboot.org
http
schrieb Harald Gutmann:
> > This patch fixes the build for the dsdt.asl/dsdt.c.
> >
> > Kconfig builds fine now, but I don't know right now if the resulting
> > image works on real hardware.
> >
> >
> > Sigend-off-by: Harald Gutmann
>
&
Hello!
I've troubles getting the M57SLI booting with the recent r5084.
The image was built using newconfig (without further changes in Config.lb), and
a seabios bootloader.
I also tried to boot the M57SLI image from Kconfig, but it seems that the
Kconfig version of that board is not really in a
This patch fixes the build for the dsdt.asl/dsdt.c.
Kconfig builds fine now, but I don't know right now if the resulting image
works
on real hardware.
Sigend-off-by: Harald Gutmann
Regards,
Harald
Index: src/mainboard/gigabyte/m57sli/Makefil
Patch once more with diff from the cb toplevel.
On Thursday 04 February 2010 11:16:23 Harald Gutmann wrote:
> Hello,
>
> as I want to get the Kconfig part of m57sli running, I needed to build once
> again a newconfig image for m57sli. The last few times I built a newconfig
> i
someone needs a 512kb sized image, just change the CONFIG_ROM_SIZE to
0x8.
I'd like to see that commited, so that I don't need to struggle with build
errors on newconfig once more. ;)
Signed-off-by: Harald Gutmann
Regards,
Harald
Index:
On Saturday 09 January 2010 23:31:03 Kevin O'Connor wrote:
> This is just a starting point for discussion. There's a good chance
> I've gotten some things wrong. The idea is to document where things
> are heading instead of how exactly they are today.
Great Idea, and nicely summed up.
Please try
On Thursday 17 December 2009 08:00:12 Rudolf Marek wrote:
> Hello all,
>
> Just FYI. I bought this motherboard. It has the socket 939, newest AMD
> 785G! It has 1MB socketed SPI flash. The superio is W83627DHG. SB is 710.
I'll have a look at that board, possibly its a good choice. But normally I
On Sunday 13 December 2009 20:52:19 Ikem Krueger wrote:
> Hi folks. I'm curious. How do I configure coreboot at runtime? I mean,
> is there a gui like I know from BIOS or EFI?
>
No, there is at the moment no such UI for coreboot directly.
Seabios offers, as far as I know the possibility to change
On Saturday 03 October 2009 22:29:32 Harald Gutmann wrote:
> Hello,
>
> here is my new patch which adds the Kconfig support for m57sli from
> gigabyte.
The changes in devicetree.cb are just whitespace fixes and I removed some parts
Kind regards,
Harald
--
coreboot mailing li
On Saturday 03 October 2009 22:29:32 Harald Gutmann wrote:
> There is one Problem with the patch, but I'm not able to track that down.
> I've really no idea what causes Kconfig to put all those warnings out with
> my patch. As this patch causes quite a massive amount of warnin
Hello,
here is my new patch which adds the Kconfig support for m57sli from gigabyte.
There is one Problem with the patch, but I'm not able to track that down.
I've really no idea what causes Kconfig to put all those warnings out with my
patch. As this patch causes quite a massive amount of warni
copying the uncompressed code to RAMand decompressing it there.
>
>
> My suggestion would be to drop support for these large flash chips on
> M57SLI for now and use the copy-to-RAM mechanism once someone complains.
> I think Harald Gutmann has such a board with big flash.
Yes, you're
Hmm... Why do I so often forget that I should/want to attach something?
Here it is.
Note: The devicetree.cb just contains some cleanup and whitespace fixes. There
have no "changes" been done on that file.
On Wednesday 26 August 2009 20:09:32 Harald Gutmann wrote:
> Here is my n
Here is my new version of the Kconfig patch for M57SLI.
It does build, but there are some warnings about CONFIG_* values not defined.
Right now I have not tested the generated images, but I think I can do that
tomorrow.
When the images work, it will get the "Signed-off" tag.
Thanks to Myles Wat
On Wednesday 26 August 2009 17:20:16 Cristi Magherusan wrote:
> Hello,
>
> See the attached (trivial) patch, inspired by the older buildsystem.
> This fixes Myles' and my compilation issues.
And mine too!
Acked-by: Harald Gutmann
revision 4584.
Kind regards,
Harald
--
core
On Monday 24 August 2009 22:36:35 Carl-Daniel Hailfinger wrote:
> Hi,
>
> On 24.08.2009 19:02, conged...@voila.fr wrote:
> > I wanted to know which development IDE do you use to develop coreboot:
> > Eclipse, Netbeans ... I can't find anything, any project under Eclipse or
> > any other IDE.
>
> I
Sorry ward for the CC to you, I wanted to CC it to Myles.
On Monday 24 August 2009 22:03:26 Harald Gutmann wrote:
> On Monday 24 August 2009 21:40:38 Myles Watson wrote:
> > >> I changed the prototype for hard_reset in
> > >> src/northbridge/amd/amdk8/am
On Monday 24 August 2009 21:40:38 Myles Watson wrote:
> >> I changed the prototype for hard_reset in
> >> src/northbridge/amd/amdk8/amdk8_f.h to:
> >> #include
> >
> > Does this mean that you added this line to the file?
> > If yes, the compiler error stays here the same.
>
> Interesting. Our tre
On Monday 24 August 2009 20:08:04 Myles Watson wrote:
> This is the southbridge part of Harald's patch and my patch merged.
>
> Signed-off-by: Myles Watson
Acked-by: Harald Gutmann
Looks all fine, thanks for merging!
Regards,
Harald
>
> Thanks,
> Myles
--
coreboot
On Friday 21 August 2009 20:22:56 Harald Gutmann wrote:
> On Friday 21 August 2009 20:14:29 you wrote:
> > > -Original Message-
> > >
> > > On Friday 21 August 2009 19:56:25 you wrote:
> > > > >> har...@benchvice:~/cb-v2$ make
> &g
On Friday 21 August 2009 20:21:27 Myles Watson wrote:
> > > OK, I am going to apply Cristi's patch, and, if it looks good, commit.
> > > Then we can do nvidia south.
> >
> > Okay, sounds good.
>
> Lets not create a new CONFIG variable SOUTHBRIDGE_NVIDIA_MCP55. I think
> that whole file can go. An
On Friday 21 August 2009 20:14:29 you wrote:
> > -Original Message-
> >
> > On Friday 21 August 2009 19:56:25 you wrote:
> > > >> har...@benchvice:~/cb-v2$ make
> > > >>GENbuild/build.h
> > > >>CC build/northbridge/amd/amdk8/misc_control.o
> > > >> In file included f
.
>
> OK, I am going to apply Cristi's patch, and, if it looks good, commit.
> Then we can do nvidia south.
Okay, sounds good.
I've reviewed the mcp55 Kconfig once more and attached it.
It seems for me that it is fine, and should work normally.
This patch is:
Si
On Friday 21 August 2009 18:10:37 ron minnich wrote:
> I'm missing
> src/southbridge/nvidia/ck804/Kconfig
Yes, because that's not needed.
The m57sli board has a mcp55 southbridge and therefore ck804 is not needed.
I removed this because I wanted to clean out and sort up the patch as far as
possibl
New patch version attached, but the compile error stays at the same state than
before.
On Friday 21 August 2009 17:31:17 ron minnich wrote:
> This is *almost* perfect. Questions and changes.
I think it would be possible to sparse some values in the mainboard directory
out, but that's a todo af
Replied in the wrong directory.
Sorry.
--- Begin Message ---
On Friday 21 August 2009 17:31:17 you wrote:
> This is *almost* perfect. Questions and changes.
>
> Index: src/cpu/amd/socket_AM2/Kconfig
> ===
> --- src/cpu/amd/socket_AM2
On Friday 21 August 2009 14:09:35 Harald Gutmann wrote:
> On Friday 21 August 2009 00:06:44 ron minnich wrote:
> > let's start over. can you tell me what changes you have made to the
> > tree at this time?
>
> Okay, and here is the full svn diff (hopefully I didn'
On Friday 21 August 2009 14:20:56 Cristi Magherusan wrote:
> On Fri, 2009-08-21 at 13:27 +0200, Harald Gutmann wrote:
> > On Friday 21 August 2009 00:06:44 ron minnich wrote:
> > > let's start over. can you tell me what changes you have made to the
> > > tree at th
On Friday 21 August 2009 00:06:44 ron minnich wrote:
> let's start over. can you tell me what changes you have made to the
> tree at this time?
Okay, and here is the full svn diff (hopefully I didn't forget to svn add
files)
of what I've already done in order to get Kconfig working on that mainbo
On Friday 21 August 2009 00:06:44 ron minnich wrote:
> let's start over. can you tell me what changes you have made to the
> tree at this time?
The tree itself has no changes in source.
I just added a few Kconfig and Makefile.inc files.
I think it's not necessary to post the patch right now, the .
Hello,
recently I'm trying to add Kconfig support to the M57SLI board from gigabyte,
but right now i stumbled into an error where I can't figure out what is wrong.
This problem is not directly related to Kconfig, but it seems that I
misunderstand something in the compiler errors, or that I'm no
On Monday 10 August 2009 00:33:05 Rudolf Marek wrote:
> Hi all,
>
> I'm prepared to come to Germany ;) as we discussed earlier seems best
> target for a meeting.
Germany wouldn't be far away, and I think I can take the time to attend the
party!
Are there any further details on that topic? When? Wh
On Saturday 08 August 2009 11:43:20 Zheng Bao wrote:
> Great. I will submit my code after this weekend.
>
> I can't wait the coming of the new era.
Is there already something according to RS780 in the tree?
Did you already commit your patch?
>
>
> Zheng.
Kind regards,
Harald
--
coreboot mailing
On Tuesday 11 August 2009 21:35:26 ron minnich wrote:
> Harald, there is a bit of documentation in there about usage of
> Kconfig and Makefile.config. It is not complete but I fill in a little
> each day. Please refer to it w.r.t. the use of mainboard and socket
> Kconfig.
>
> What if we apply this
On Tuesday 11 August 2009 18:15:16 Patrick Georgi wrote:
> https://www.coresystems.de/~patrick/20090811-1-kconfig is an updated patch,
> with some AMD support by Ron.
Fine to see your Kconfig patch.
Right now I'm adding the gigabyte M57SLI target to Kconfig.
And, there are in the coreboot-v2-kconf
On Saturday 08 August 2009 13:42:55 Carl-Daniel Hailfinger wrote:
> On 08.08.2009 13:12, Harald Gutmann wrote:
> > On Saturday 08 August 2009 03:14:43 Carl-Daniel Hailfinger wrote:
> >> Together with the recent SB700/SB710/SB750 documentation release, the
> >> Developer
On Saturday 08 August 2009 03:14:43 Carl-Daniel Hailfinger wrote:
> Together with the recent SB700/SB710/SB750 documentation release, the
> Developer Guide release for the RS780 family of Integrated Chipset/
> Graphics Processors enables the coreboot community to support any board
> with AMD chipse
On Tuesday 14 July 2009 00:34:12 Tom Sylla wrote:
> On Mon, Jul 13, 2009 at 4:14 PM, Harald Gutmann
wrote:
> > [*] How to figure out the UDMA modes supported by the attached devices in
> > coreboot? As this is according to IDE devices which can be changed at any
> > time, it
On Monday 13 July 2009 20:32:46 Harald Gutmann wrote:
> 4. assume you did everything right and claim that it is value 0x72
> (hopefully you got it right with the pci-register-endianness and the
> address number). ;)
Okay, this was for sure wrong, as I read the line number instead the pci-
On Tuesday 07 July 2009 23:11:18 Carl-Daniel Hailfinger wrote:
> On 07.07.2009 21:47, Peter Stuge wrote:
> > Harald Gutmann wrote:
> >> PCI registers on coreboot address 0x52 (from the IDE device) has
> >> value FF while proprietary has value 99. This is th
On Tuesday 07 July 2009 22:45:08 Myles Watson wrote:
> I have two boards, the s2892 and the s2895. I can power on the s2892 while
> holding in reset, but the s2895 powers off after a second.
Just for my interest, but why does someone need to power on a system while
holding the reset button?
> An
On Tuesday 07 July 2009 21:47:57 Peter Stuge wrote:
> Harald Gutmann wrote:
> > PCI registers on coreboot address 0x52 (from the IDE device) has
> > value FF while proprietary has value 99. This is the so called
> > "CABLE_BIT".
>
> Fair enough, but this is
> Found!
>
> According to some kernel sources and the differences in the pci-registers
> between proprietary bios and coreboot there are two values which are
> needed:
>
> AMD_CABLE_DETECT = 0x42
> AMD_UDMA_TIMING = 0x50
>
> But, for PCI_VENDOR_ID_NVIDIA an offset of 0x10 has to be added, which
>
On Tuesday 07 July 2009 19:30:03 Peter Stuge wrote:
> Harald Gutmann wrote:
> > > * hda: UDMA/33 compared to UDMA/66 with prop. BIOS
> >
> > My suggestion would be to open up a new ML-thread according to this
> > problem.
>
> Good idea.
>
> > It sho
On Tuesday 07 July 2009 19:30:03 Peter Stuge wrote:
> Harald Gutmann wrote:
> > > * hda: UDMA/33 compared to UDMA/66 with prop. BIOS
> >
> > My suggestion would be to open up a new ML-thread according to this
> > problem.
>
> Good idea.
Thanks for doing so!
On Tuesday 07 July 2009 18:52:43 Andreas B. Mundt wrote:
> Hi,
>
> >>[...]
> >>pnp: PnP ACPI: found 6 devices
> >
> >What option did you set to get pnp messages? acpi=debug?
>
> No, just default dmesg on debian squeeze.
>
>
> So, updated remaining minor issues for the m57sli:
>
> * missing
; pnp 00:05: add io 0x778-0x77b flags 0x1
> pnp 00:05: add irq 7 flags 0x1
> pnp 00:05: add dma 0 flags 0x0
> pnp 00:05: Plug and Play ACPI device, IDs PNP0401 (active)
> pnp: PnP ACPI: found 6 devices
What option did you set to get pnp messages? ac
On Saturday 04 July 2009 11:02:36 Harald Gutmann wrote:
> On Thursday 02 July 2009 23:26:34 Peter Stuge wrote:
> > Harald Gutmann wrote:
> > > > Is the port interrupt-driven, or polling, on your system, Andreas?
> > >
> > > Here on my system it says also poll
On Thursday 02 July 2009 23:26:34 Peter Stuge wrote:
> Harald Gutmann wrote:
> > > Is the port interrupt-driven, or polling, on your system, Andreas?
> >
> > Here on my system it says also polling, like on Andreas system.
> > What is the difference betwee
On Friday 03 July 2009 00:15:33 Rudolf Marek wrote:
> > Maybe Rudolf Marek can us help here, because he wrote the automatic
> > generation for that ACPI table (SSDT).
>
> Hi,
>
> If I understand correctly, the 1800MHz is missing? If so, please check what
> is the portal frequency for this CPU. Mayb
On Thursday 02 July 2009 23:26:34 Peter Stuge wrote:
> Harald Gutmann wrote:
> > > Is the port interrupt-driven, or polling, on your system, Andreas?
> >
> > Here on my system it says also polling, like on Andreas system.
> > What is the difference betwee
On Thursday 02 July 2009 21:40:52 Peter Stuge wrote:
> Andreas B. Mundt wrote:
> > > With the attached patch I get the following output on modprobe parport:
> > > [ 28.848297] lp0: using parport0 (polling).
> >
> > Patch tested succesfully with parallel-port printer.
>
> Is the port interrupt-dri
On Thursday 02 July 2009 20:58:42 Andreas B. Mundt wrote:
> On Thursday 02 July 2009 20:22:50 Harald Gutmann wrote:
> > On Thursday 02 July 2009 17:56:30 Andreas B. Mundt wrote:
> > > Hi everybody,
> > >
> > > just noticed that my parallel port printer unfortuna
On Thursday 02 July 2009 20:22:50 Harald Gutmann wrote:
> On Thursday 02 July 2009 17:56:30 Andreas B. Mundt wrote:
> > Hi everybody,
> >
> > just noticed that my parallel port printer unfortunately only works
> >
> > with the prop. BIOS:
> > >From dmes
On Thursday 02 July 2009 17:56:30 Andreas B. Mundt wrote:
> Hi everybody,
>
> just noticed that my parallel port printer unfortunately only works
>
> with the prop. BIOS:
> >From dmesg:
>
> coreboot:
> [ 54.388956] lp: driver loaded but no devices found
> [ 54.409159] ppdev: user-space parallel
0 61 62 63 70 74 f0
> > val 01 03 78 00 00 07 04 08
>
> LDN 30 bit 1 is almost always enable. So coreboot simply does not
> enable the parallel port.
>
> Harald Gutmann wrote:
> > I've no parallel port hardware and therefore not cared about this,
> > but I thin
On Thursday 02 July 2009 17:56:30 Andreas B. Mundt wrote:
> Hi everybody,
>
> just noticed that my parallel port printer unfortunately only works
I've no parallel port hardware and therefore not cared about this, but I think
we can fix this.
The floppy issue is hopefully the same way to fix than p
On Wednesday 01 July 2009 16:21:39 Andreas B. Mundt wrote:
> Hi everybody,
>
> with the help of Harald's seaBIOS-payload I managed to run the latest
> coreboot (revision 4387) on my v1.0 m57sli-board. From a first look
> everything seems to work: kvm, sound, power-now frequency scaling.
> dmesg is
On Thursday 25 June 2009 07:50:53 Rick Ant wrote:
> Anyone know how to use emulation-qemu-x86.rom
> ron minnich send me one...
Execute it with qemu?
Read on the wiki about qemu?
http://www.coreboot.org/QEMU
You CAN'T use this image directly on REAL hardware.
> Thanks
Please be so kindly and consi
On Thursday 25 June 2009 07:45:48 Rick Ant wrote:
> tell me how to use it?
> My system configuration is
> Intel PIII 82810 Northbridge and 82801 Southbridge 128 Mb Ram and 49LF004
> Flash ROM I want to embed coreboot and Linux into 49LF004, so it will
> become thin client which will connect to the
On Thursday 25 June 2009 05:58:40 jasonz...@viatech.com.cn wrote:
> Hi Rudolf ,
> I want to update my vx855 code using the newest version of coreboot-v2,
> to take advantage of new functions(such as smi,AML-auto-generator) that
> appear on coreboot in the last months.
>
> And, since I also want
On Thursday 25 June 2009 05:09:04 Rick Ant wrote:
> I try to use
> $ mkelfImage --append="console=ttyS0" --initrd=initrd vmlinuz linux.elf
>
> When :
> telebit:~/Project/Kantor/Thin_client/coreboot-v2-4360/targets #
> ./buildtarget emulation/qemu-x86/Config.lb
>
> and do
>
> make..
>
> I get corebo
On Thursday 25 June 2009 04:46:32 Gregg C Levine wrote:
> Hello!
> I just used buildrom to create a Qemu image for trying out the coreinfo
> payload. It worked perfectly with the prebuilt and unpatched version of
> Qemu that I collected from a repository for my distribution of Linux.
That's how it
On Thursday 25 June 2009 04:04:08 Rick Ant wrote:
> Hello,
>
> Is it possible for me to integrate the Linux Kernel Into the Flash ROM
> 49LF004 and starting the X-server ?
Do you really want X in ROM?
It is possible, but you'll need some more space in the Flash. (1Mb is pretty
less for Kernel + X)
Hello,
I know how the coreboot image is scaled with Failover/Fallback/Normal.
http://www.coreboot.org/Anatomy_of_a_Failover_coreboot_v2_Image
But my question is when does coreboot access Failover or Fallback?
I wasn't able to determine that, but it would be good to know.
Kind regards,
Harald
-
On Wednesday 24 June 2009 18:12:33 Harald Gutmann wrote:
> On Wednesday 24 June 2009 17:54:51 Peter Stuge wrote:
> > Harald Gutmann wrote:
> > > What do I need except a kernel image which has all drivers
> > > compilled in?
> > > What needs to be done to get
On Wednesday 24 June 2009 17:54:51 Peter Stuge wrote:
> Harald Gutmann wrote:
> > What do I need except a kernel image which has all drivers
> > compilled in?
> > What needs to be done to get this setup working?
>
> Two ways:
>
> 1. Use mkelfImage to get a p
Hello,
to get a fast boot time on my mainboard I want to stick a whole kernel-image
into my flashchip.
The idea I want to realize is to have a kernel image in the Flash which has
all drivers for my hardware compiled in.
I don't want to have a busybox environment or an X-server in the flash, but
On Wednesday 24 June 2009 16:00:12 Uwe Hermann wrote:
> See patch.
>
> Tested on one board, other tests are welcome.
Tested on M57SLI v2 (spi). Works fine!
Acked-by: Harald Gutmann
>
>
> Uwe.
Harald
signature.asc
Description: This is a digitally signed message part.
--
cor
On Wednesday 24 June 2009 12:50:01 Carl-Daniel Hailfinger wrote:
> Hi,
>
> AFAICS the time has come to give flashrom its own mailing list (maybe
> flash...@coreboot.org) and IRC channel (irc.freenode.net/#flashrom).
>
> I do realize this has been brought up in the past, but while I was
> sceptical
Hello Jon,
I'm really interested in your work on CN400 as i own an EPIA-SP, but right now
I don't have the possibilities to test something on that board.
Can you please be so kindly and attach the patch you posted as a file, because
this would make life more easyier for testing/reviewing your pa
On Wednesday 24 June 2009 06:46:58 Rick Ant wrote:
> I try to install Flash ROM,
>
> but need zlib-devel and pciutils-devel,
Install the according -dev packages.
I don't know how they're called in SuSe.
>
> I'm using Suse 10.1,
>
> Can I install Coreboot + payload Linux without any Compact flash?
t \_SB_PCI0.
>
> This patch adds a proper namestring generation to our ACPIgen generator.
> Its used for Name and Scope and Processor now. As bonus, it allows to
> create a multi name paths too. Like Scope(\ALL.YOUR.BASE).
>
> Signed-off-by: Rudolf Marek
Acked-by: Harald Gutmann
On Sunday 21 June 2009 07:23:53 Drew Diller wrote:
> My system sits on a Gigabyte GA-P35-DS3L mainboard with an Intel Core
> 2 Duo E6750 CPU. I am wondering if you think it will work /
> anecdotally know it will work with coreboot, as I did not see the
> model on the "supported mainboards" page.
>
loppy device and the possibility to test it, please do so and
report if it works. (Otherwise I'll test that in a few weeks, as i don't have
a floppy device here.)
Great that this patches make you happy, and hopefully everything works like
expected. If you run into problems please r
whitespace/indenting fix on Config.lb but attaching
>> this
>> to the acpi patch would just blow it up too much.
> Sure. I just meant the lines you were touching.
> Acked-by: Myles Watson
On Thursday 18 June 2009 22:20:24 Peter Stuge wrote:
> Harald Gutmann wrote:
> > His ex
On Thursday 18 June 2009 22:20:24 Peter Stuge wrote:
> Harald Gutmann wrote:
> > His explanation was quite easy: You'll need the _CRS symbols in
> > your dsdt.asl.
> >
> > I had a look at his dsdt.asl from asus/m2v-mx_se, and saw that
> > there are not much _
On Thursday 18 June 2009 21:05:30 Peter Stuge wrote:
> Harald Gutmann wrote:
> > And got some further improvements to be able to install and boot
> > windows 7 from coreboot with acpi support on m57sli.
>
> Very cool! Can you say something about what was required to do this?
Y
On Thursday 18 June 2009 19:28:50 you wrote:
> Hi Harald,
>
> Harald Gutmann schreef:
> > Fine that you found it, and that everything works for you.
> > Just one more question on that topic:
> >
> > Which mainboard hardware revision do you use?
>
> I have a
+1,173 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Nick Barker
+ * Copyright (C) 2007 Rudolf Marek
+ * Copyright (C) 2009 Harald Gutmann
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General
On Tuesday 16 June 2009 14:18:41 Carl-Daniel Hailfinger wrote:
> Hi Harald,
>
> On 14.06.2009 16:25, Harald Gutmann wrote:
> > here is the new version of the fix.
> > I cleaned out all of the stuff you mentioned.
> >
> > The last point with initializing some
On Tuesday 16 June 2009 14:14:24 Carl-Daniel Hailfinger wrote:
> On 14.06.2009 16:45, Harald Gutmann wrote:
> > Hello!
> >
> > This little patch activates HIGH_TABLES on M57SLI.
> > I tested it with a recent SeaBios version, and it works.
> >
> > Signed-off-b
On Thursday 18 June 2009 11:37:16 Harald Gutmann wrote:
> On Tuesday 16 June 2009 14:14:24 Carl-Daniel Hailfinger wrote:
> > On 14.06.2009 16:45, Harald Gutmann wrote:
> > > Hello!
> > >
> > > This little patch activates HIGH_TABLES on M57SLI.
> > > I
On Tuesday 16 June 2009 14:14:24 Carl-Daniel Hailfinger wrote:
> On 14.06.2009 16:45, Harald Gutmann wrote:
> > Hello!
> >
> > This little patch activates HIGH_TABLES on M57SLI.
> > I tested it with a recent SeaBios version, and it works.
> >
> > Signed-off-b
On Thursday 18 June 2009 01:01:17 Ronald Hoogenboom wrote:
> Hi again Harald,
>
> On Thu, 2009-06-18 at 00:28 +0200, Ronald Hoogenboom wrote:
> > Hi Harald,
> >
> > I tried it after first undoing your previous acpi patch, but it doesn't
> > work for me. The linux kernel freezes directly after print
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