[coreboot] option rom size problem

usb stack properly. Is there any other method for us to expand the rom size? -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] option rom new progress

details. my next progress is going to make the option rom init funciton can detect the usb devices -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] option rom problems with DBM690T+VT6202L

/dev/func is 06/05/01, but while seabios search it as 00/05/01. -- Jason Wang Peking University coreboot-2.0.0-r4253M Tue Jul 28 03:50:01 CST 2009 starting... bsp_apicid=0x0 core0 started: 01SBLink=00 NC node|link=00 rs690_early_setup() get_cpu_rev EAX=0x60f82. CPU Rev is K8_G0. NB Revision is

Re: [coreboot] option rom problems with DBM690T+VT6202L

oh... i find libpaylod usb stack hard code the bus to 0. it should display the bus number. On Mon, Jul 27, 2009 at 11:42 PM, Jason Wang wrote: > Hi all, >Since DBM690T does not have UHCI controller, i bought an PCI-USB card > which contained two UHCI controller. But It alwa

Re: [coreboot] option rom problems with DBM690T+VT6202L

hi Kevin, the attach file is the whole log On Tue, Jul 28, 2009 at 7:32 AM, Kevin O'Connor wrote: > On Mon, Jul 27, 2009 at 11:42:18PM +0800, Jason Wang wrote: > > Hi all, > >Since DBM690T does not have UHCI controller, i bought an PCI-USB card > > which containe

Re: [coreboot] option rom problems with DBM690T+VT6202L

AM, Jason Wang wrote: > > hi Kevin, > > the attach file is the whole log > > > > On Tue, Jul 28, 2009 at 7:32 AM, Kevin O'Connor > wrote: > >> > >> On Mon, Jul 27, 2009 at 11:42:18PM +0800, Jason Wang wrote: > >> > Hi all, > >&

Re: [coreboot] malloc.c problems of option rom

02.4 OHCI controller Not supported. 00:13.5 4386:1002.5 EHCI controller Not supported. 00:05.0 3038:1106.0 UHCI controller alloc 82 length:0x238,ptr=0x3077e0 alloc 83 memory begin:0x77e0 end:0x577e0, hstart:0x30 set up error,*ptr=0xa2c0e2cc memory allocator panic!!! the size=0xc0e2cc. header

[coreboot] filo compile errors

/shared.h(revision 103) +++ include/grub/shared.h(working copy) @@ -55,6 +55,7 @@ #define COMPLETION_BUFLENMAX_CMDLINE /* The buffer for the unique string. */ +extern char UNIQUE_BUF[]; #define UNIQUE_BUFLENMAX_CMDLINE /* The buffer for the menu entries. */ -- Jason Wang Peking

[coreboot] usb rom progress

? set_address failed fullspeed device control packet, req 500 SETUP packet (at 6ad00) to 0.0 failed td (counter at 3) returns: bitstuff err: 0, CRC err: 0, NAK rcvd: 0, Babble: 0, Data Buffer err : 0, Stalled: 0, Active: 1 still active - timeout? set_address failed fullspeed device -- Jason Wang

[coreboot] option rom progress and some issues

e add_bcv to add option rom into IPL ? or just take the ata as example? -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] option rom progress and some issues

Hi Kevin, On Wed, Aug 12, 2009 at 8:18 AM, Kevin O'Connor wrote: > On Wed, Aug 12, 2009 at 03:59:02AM +0800, Jason Wang wrote: > > Hi all > > Since USB ROM has already added into the booting menu list(IPL > table), > > and the UHCI stack can be run well in usbr

Re: [coreboot] option rom progress and some issues

Hi Kevin, The Seabios try to booting usbrom with IPL_TYPE_BEV, which i think should use IPL_TYPE_HARDDISK, right? Followed by BIOS BOOT Specification I think it can add #define IPL_TYPE_USBROM 0x05 to support BCV, how do you think about that? On Wed, Aug 12, 2009 at 10:59 AM, Jason Wang

Re: [coreboot] option rom progress and some issues

On Wed, Aug 12, 2009 at 9:17 PM, Kevin O'Connor wrote: > On Wed, Aug 12, 2009 at 03:29:06PM +0800, Jason Wang wrote: > > Hi Kevin, > > The Seabios try to booting usbrom with IPL_TYPE_BEV, which i think > > should use IPL_TYPE_HARDDISK, right? Followed by BIOS BOOT

Re: [coreboot] option rom progress and some issues

On Thu, Aug 13, 2009 at 7:24 AM, Kevin O'Connor wrote: > On Thu, Aug 13, 2009 at 02:22:05AM +0800, Jason Wang wrote: > > On Wed, Aug 12, 2009 at 9:17 PM, Kevin O'Connor > wrote: > > > > > On Wed, Aug 12, 2009 at 03:29:06PM +0800, Jason Wang wrote: > >

Re: [coreboot] usbrom progress

stion will be welcome. On Mon, Aug 17, 2009 at 12:26 AM, Kevin O'Connor wrote: > On Mon, Aug 17, 2009 at 12:06:04AM +0800, Jason Wang wrote: > > hi all, > >here is my usbrom latest progress. > > 1) usbrom can hook int13 > > 2) usbrom can support int13 lba mode

[coreboot] usbrom boot grub

linux. And try to boot that later. BTW, Kevin , do you know the reason why the bios does not support larger cylinder? -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] usbrom boot grub

7;Connor wrote: > On Wed, Aug 19, 2009 at 06:30:12PM +0800, Jason Wang wrote: > > Hi all, > > I am glad to tell you that usbrom can boot grub from usb disk > > correctly. It can not boot linux by error " Selected cylinder exceeds > > maximum supported by bio

Re: [coreboot] usbrom boot grub

usb blocks :3907583 CHS = 243/255/63 On Thu, Aug 20, 2009 at 8:44 PM, Kevin O'Connor wrote: > On Thu, Aug 20, 2009 at 05:32:02PM +0800, Jason Wang wrote: > > hi kevin, > >Since the CHS/LBA also has been resovled yesterday, now the problems > is > > that > &

Re: [coreboot] usbrom boot grub

hi, the problem has been resolved...the cat /menu.lst works fine. status now is while loading kernel, it crashed On Thu, Aug 20, 2009 at 10:37 PM, Jason Wang wrote: > usb blocks :3907583 > CHS = 243/255/63 > > On Thu, Aug 20, 2009 at 8:44 PM, Kevin O'Connor wrote: &g

[coreboot] usbrom debugging

call ecx Kevin allow remind me that usbrom have an 1M heap which will overwrite SeaBIOS in the 0xf. That may also a problem. any suggestion is welcome. -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] usbrom debugging

On Sun, Aug 23, 2009 at 5:45 AM, Kevin O'Connor wrote: > On Sun, Aug 23, 2009 at 04:03:40AM +0800, Jason Wang wrote: > > Hi all, > > I am trying to debug why the grub crashed (under usbrom) after > loading > > certain blocks into the memory. > > My new foun

[coreboot] usbrom + invanders

Hi all, USB ROM can successfully load grub+invanders now. And i am trying to use PMM to get enouth memory at the top address. -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Seabios/Coreboot USB Keyboard support

t; as simple as installing windows from CD one need to react about "Press any > key to boot from cdrom". > > Thank you! > > Arnaud > > > > > > -- > coreboot mailing list: coreboot@coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > -

Re: [coreboot] buildrom

NO 114 of Nanta > Street of Shenyang,China > Post code : > 110016 > > > -- > coreboot mailing list: coreboot@coreboot.org > http://www.coreboot.org/mailman/listinf

Re: [coreboot] SeaBIOS and USB?

than > 30K of option rom space or more than 20K of reserved memory. > > Anyway, it would be helpful to hear from those that are planning to > work in this area and the work that they are planning. > > Thanks, > -Kevin > > -- > coreboot mailing list: coreboot@coreb

[coreboot] question about irc

Hi all, Is there anyone who know how to use IRC to join in coreboot chat? I really do not know how to apply an account for it. -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] cross build tools

Hi, stefan, i tried to use the crossgcc scipt, but the last source code binutils-2.18-50-20080109-2 can not be found. Can you give me another link? I tried to find some other source code including binutils-2.18.tat.gz, but failed with combining gcc with binutils. -- Jason Wang Peking

[coreboot] way for Seabios to load option rom

Hi all, Is there a way for seabios to load an option rom from coreboot? or is there any other payload can do that? -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] SeaBIOS HAVE_HIGH_TABLES

On Tue, Apr 14, 2009 at 11:37 PM, Jason Wang wrote: > On Tue, Apr 14, 2009 at 8:13 PM, Joseph Smith wrote: >> >> Hello, >> I was just checking out the SeaBIOS Wiki page updates (great job by the >> way:-)). I am wondering about the HAVE_HIGH_TABLES section. It seems

Re: [coreboot] GSoC: Seabios USB Option ROM, small initial planning

I CC the mentors and people I judge > interested? or, is coreboot@coreboot.org good enough? ;-) > > [1] - http://vps.dorilex.net/cgi-bin/gitweb.cgi > > Thanks in advance > > -- > (°= Leandro Dorileo > //\ldori...@gmail.com - http://www.dorilex.net > V_/ So

Re: [coreboot] libpayload within option rom dir

about that ? [1]http://vps.dorilex.net/cgi-bin/gitweb.cgi?p=usbrom.git;a=summary -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] SGABIOS checksum [ke...@koconnor.net: Re: SeaBIOS, serial output, and grub]

t mailing list: coreboot@coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > > - End forwarded message - > > -- > coreboot mailing list: coreboot@coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [USBOPTIONROM] Turn Real Mode to PM mode

ase_addr16_23 .byte 0x92 # flags .byte 0xcf # access .byte 0 # base_addr24_31 gdt_end: gdt_desc: .word (gdt_end - gdt_marker - 1) # GDT limit .long (gdt_marker - _base_address-8) # physical addr of GDT -- Jason Wang Peking University -- coreboot mailing list: coreboot@core

[coreboot] use libpayload in optionrom

onfig.h" in the main.c. it doesn't work when i am trying to print out message which use " printf("hello optionrom")". Is there any other things i should do? All my source code was in http://vps.dorilex.net/cgi-bin/gitweb.cgi?p=optionrom.git;a=summary Need some help a

Re: [coreboot] GSOC USBROM linking problem

I think -fpic and -fpie as we do it in v3 are > > rather questionable. > > > > > Regards, > Carl-Daniel > -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] GSoC 2010

does coreboot and flashrom will join gsoc 2010 as an union or else? i am thinking who about making flashrom can be used under windows? On Sat, Mar 6, 2010 at 4:29 PM, Darmawan Salihun wrote: > Flashrom used to have Windows port that I worked on back in 2007 > (Winflashrom). I'm willing to help i

Re: [coreboot] [PATCH]: AMD RS780/SB700 support

hi carl, i think we can choose a bunch of RS780 series mainboard, then porting coreboot to each of them. Anyway, it's impossible of mass-porting all of the RS780 series mainboard On Tue, Mar 16, 2010 at 10:10 AM, Carl-Daniel Hailfinger < c-d.hailfinger.devel.2...@gmx.net> wrote: > This is reall

Re: [coreboot] VGA rom can not be loaded by SEABIOS

hi Kevin, I have already found the problem. Coreboot now use cbfs to organize the option rom. The vga.rom may be renamed like pci1002,731F.rom. But in seabios/optionrom.c it just check the filename with prefix "vgaroms/" which can not load the vgarom. maybe coreboot should organzie the vga ro

Re: [coreboot] FW: VGA rom can not be loaded by SEABIOS

gt; > > > Jason Wang > > BeiJing Technology Development Center > > Advanced Micro Devices (AMD) > > > ------ > > *From:* Jason Wang [mailto:wangqing...@gmail.com] > *Sent:* Thursday, March 18, 2010 12:05 PM > *To:* Wang, Qingpei

Re: [coreboot] RFC porting of SB7x00/RS78x boards

hi Rudolf, Since mass-porting to AMD 780 series mainboards is taken included in GSoC 2010, the further work may be completed between this summer. I would like to take all of your consideration as Reference for my application. best wishes. Wang Qing Pei On Sun, Mar 21, 2010 at 8:28 PM, Rudolf Ma

[coreboot] remove some warning of sb600

Index: src/southbridge/amd/rs690/rs690_early_setup.c === --- src/southbridge/amd/rs690/rs690_early_setup.c(revision 5266) +++ src/southbridge/amd/rs690/rs690_early_setup.c(working copy) @@ -128,7 +128,7 @@ /* * Compliant with

Re: [coreboot] remove some warning of sb600

signed-off-by: Wang Qing Pei On Mon, Mar 22, 2010 at 8:20 PM, Jason Wang wrote: > Index: src/southbridge/amd/rs690/rs690_early_setup.c > === > --- src/southbridge/amd/rs690/rs690_early_setup.c(revision 5266)